Re: [Qemu-devel] [PATCH v2 3/5] target/mips: Exit after enabling interrupts

[Richard Henderson]

On 06/15/2017 02:19 PM, Aurelien Jarno wrote:
> While the above looks correct, it's not complete. It only fixes the
> microMIPS EI instruction. The MIPS one also has to be fixed.
>
> For what I understood, anything that can change the result of
> cpu_mips_hw_interrupts_enabled has to stop the translation. In that case
> I checked that ERET/ERETNC and MTC0/DMTC0 to the Status register are
> already correct, that said it might be a good idea to update the
> comments to mention it.
>
> I can work on a better patch, but I doubt I'll have time before the
> week-end.

Ok, I'll drop this one for now.  It's not urgent.


r~