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[Qemu-devel] [PULL 05/10] tcg/arm: Use indirect branch for goto_tb
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL 05/10] tcg/arm: Use indirect branch for goto_tb |
Date: |
Tue, 13 Jun 2017 22:23:06 -0700 |
Signed-off-by: Richard Henderson <address@hidden>
---
include/exec/exec-all.h | 5 +----
tcg/arm/tcg-target.inc.c | 17 ++---------------
2 files changed, 3 insertions(+), 19 deletions(-)
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 87ae10b..724ec73 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -301,7 +301,7 @@ static inline void
tlb_flush_by_mmuidx_all_cpus_synced(CPUState *cpu,
#define CODE_GEN_AVG_BLOCK_SIZE 150
#endif
-#if defined(__arm__) || defined(_ARCH_PPC) \
+#if defined(_ARCH_PPC) \
|| defined(__x86_64__) || defined(__i386__) \
|| defined(__sparc__) || defined(__aarch64__) \
|| defined(__s390x__) || defined(__mips__) \
@@ -401,9 +401,6 @@ static inline void tb_set_jmp_target1(uintptr_t jmp_addr,
uintptr_t addr)
#elif defined(__aarch64__)
void aarch64_tb_set_jmp_target(uintptr_t jmp_addr, uintptr_t addr);
#define tb_set_jmp_target1 aarch64_tb_set_jmp_target
-#elif defined(__arm__)
-void arm_tb_set_jmp_target(uintptr_t jmp_addr, uintptr_t addr);
-#define tb_set_jmp_target1 arm_tb_set_jmp_target
#elif defined(__sparc__) || defined(__mips__)
void tb_set_jmp_target1(uintptr_t jmp_addr, uintptr_t addr);
#else
diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c
index 9f5cb66..fce382f 100644
--- a/tcg/arm/tcg-target.inc.c
+++ b/tcg/arm/tcg-target.inc.c
@@ -1026,16 +1026,6 @@ static void tcg_out_call(TCGContext *s, tcg_insn_unit
*addr)
}
}
-void arm_tb_set_jmp_target(uintptr_t jmp_addr, uintptr_t addr)
-{
- tcg_insn_unit *code_ptr = (tcg_insn_unit *)jmp_addr;
- tcg_insn_unit *target = (tcg_insn_unit *)addr;
-
- /* we could use a ldr pc, [pc, #-4] kind of branch and avoid the flush */
- reloc_pc24_atomic(code_ptr, target);
- flush_icache_range(jmp_addr, jmp_addr + 4);
-}
-
static inline void tcg_out_goto_label(TCGContext *s, int cond, TCGLabel *l)
{
if (l->has_value) {
@@ -1665,11 +1655,8 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode
opc,
}
break;
case INDEX_op_goto_tb:
- if (s->tb_jmp_insn_offset) {
- /* Direct jump method */
- s->tb_jmp_insn_offset[args[0]] = tcg_current_code_size(s);
- tcg_out_b_noaddr(s, COND_AL);
- } else {
+ tcg_debug_assert(s->tb_jmp_insn_offset == 0);
+ {
/* Indirect jump method */
intptr_t ptr = (intptr_t)(s->tb_jmp_target_addr + args[0]);
tcg_out_movi32(s, COND_AL, TCG_REG_R0, ptr & ~0xfff);
--
2.9.4
- [Qemu-devel] [PULL 00/10] TCG queued patches, Richard Henderson, 2017/06/14
- [Qemu-devel] [PULL 03/10] translate-all: consolidate tb init in tb_gen_code, Richard Henderson, 2017/06/14
- [Qemu-devel] [PULL 01/10] util: add cacheinfo, Richard Henderson, 2017/06/14
- [Qemu-devel] [PULL 02/10] tcg: allocate TB structs before the corresponding translated code, Richard Henderson, 2017/06/14
- [Qemu-devel] [PULL 04/10] tcg/aarch64: Use ADR in tcg_out_movi, Richard Henderson, 2017/06/14
- [Qemu-devel] [PULL 05/10] tcg/arm: Use indirect branch for goto_tb,
Richard Henderson <=
- [Qemu-devel] [PULL 06/10] tcg/arm: Remove limit on code buffer size, Richard Henderson, 2017/06/14
- [Qemu-devel] [PULL 07/10] tcg/arm: Try pc-relative addresses for movi, Richard Henderson, 2017/06/14
- [Qemu-devel] [PULL 09/10] Revert "target/aarch64: optimize indirect branches", Richard Henderson, 2017/06/14
- [Qemu-devel] [PULL 08/10] tcg/arm: Use ldr (literal) for goto_tb, Richard Henderson, 2017/06/14
- [Qemu-devel] [PULL 10/10] tcg: Remove tb_htable_lookup from helper_lookup_tb_ptr, Richard Henderson, 2017/06/14
- Re: [Qemu-devel] [PULL 00/10] TCG queued patches, no-reply, 2017/06/14
- Re: [Qemu-devel] [PULL 00/10] TCG queued patches, no-reply, 2017/06/14
- Re: [Qemu-devel] [PULL 00/10] TCG queued patches, Richard Henderson, 2017/06/14