[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL v2 42/70] target/s390x: implement local-TLB-clearing
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL v2 42/70] target/s390x: implement local-TLB-clearing in IPTE |
Date: |
Tue, 6 Jun 2017 17:30:51 -0700 |
From: Aurelien Jarno <address@hidden>
And at the same time make IPTE SMP aware.
Reviewed-by: Thomas Huth <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target/s390x/helper.h | 2 +-
target/s390x/mem_helper.c | 21 +++++++++++++--------
target/s390x/translate.c | 6 +++++-
3 files changed, 19 insertions(+), 10 deletions(-)
diff --git a/target/s390x/helper.h b/target/s390x/helper.h
index cc451c7..3f5a05d 100644
--- a/target/s390x/helper.h
+++ b/target/s390x/helper.h
@@ -111,7 +111,7 @@ DEF_HELPER_4(mvcs, i32, env, i64, i64, i64)
DEF_HELPER_4(mvcp, i32, env, i64, i64, i64)
DEF_HELPER_4(sigp, i32, env, i64, i32, i64)
DEF_HELPER_FLAGS_2(sacf, TCG_CALL_NO_WG, void, env, i64)
-DEF_HELPER_FLAGS_3(ipte, TCG_CALL_NO_RWG, void, env, i64, i64)
+DEF_HELPER_FLAGS_4(ipte, TCG_CALL_NO_RWG, void, env, i64, i64, i32)
DEF_HELPER_FLAGS_1(ptlb, TCG_CALL_NO_RWG, void, env)
DEF_HELPER_FLAGS_1(purge, TCG_CALL_NO_RWG, void, env)
DEF_HELPER_2(lra, i64, env, i64)
diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c
index 0ebd65d..ddbebcd 100644
--- a/target/s390x/mem_helper.c
+++ b/target/s390x/mem_helper.c
@@ -1073,17 +1073,16 @@ uint32_t HELPER(mvcp)(CPUS390XState *env, uint64_t l,
uint64_t a1, uint64_t a2)
}
/* invalidate pte */
-void HELPER(ipte)(CPUS390XState *env, uint64_t pto, uint64_t vaddr)
+void HELPER(ipte)(CPUS390XState *env, uint64_t pto, uint64_t vaddr,
+ uint32_t m4)
{
CPUState *cs = CPU(s390_env_get_cpu(env));
uint64_t page = vaddr & TARGET_PAGE_MASK;
uint64_t pte_addr, pte;
- /* XXX broadcast to other CPUs */
-
/* Compute the page table entry address */
pte_addr = (pto & _SEGMENT_ENTRY_ORIGIN);
- pte_addr += (vaddr & _VADDR_PX) >> 9;
+ pte_addr += (vaddr & VADDR_PX) >> 9;
/* Mark the page table entry as invalid */
pte = ldq_phys(cs->as, pte_addr);
@@ -1092,13 +1091,19 @@ void HELPER(ipte)(CPUS390XState *env, uint64_t pto,
uint64_t vaddr)
/* XXX we exploit the fact that Linux passes the exact virtual
address here - it's not obliged to! */
- tlb_flush_page(cs, page);
+ /* XXX: the LC bit should be considered as 0 if the local-TLB-clearing
+ facility is not installed. */
+ if (m4 & 1) {
+ tlb_flush_page(cs, page);
+ } else {
+ tlb_flush_page_all_cpus_synced(cs, page);
+ }
/* XXX 31-bit hack */
- if (page & 0x80000000) {
- tlb_flush_page(cs, page & ~0x80000000);
+ if (m4 & 1) {
+ tlb_flush_page(cs, page ^ 0x80000000);
} else {
- tlb_flush_page(cs, page | 0x80000000);
+ tlb_flush_page_all_cpus_synced(cs, page ^ 0x80000000);
}
}
diff --git a/target/s390x/translate.c b/target/s390x/translate.c
index 67ddf1b..0a1b3b3 100644
--- a/target/s390x/translate.c
+++ b/target/s390x/translate.c
@@ -2357,8 +2357,12 @@ static ExitStatus op_ipm(DisasContext *s, DisasOps *o)
#ifndef CONFIG_USER_ONLY
static ExitStatus op_ipte(DisasContext *s, DisasOps *o)
{
+ TCGv_i32 m4;
+
check_privileged(s);
- gen_helper_ipte(cpu_env, o->in1, o->in2);
+ m4 = tcg_const_i32(get_field(s->fields, m4));
+ gen_helper_ipte(cpu_env, o->in1, o->in2, m4);
+ tcg_temp_free_i32(m4);
return NO_EXIT;
}
--
2.9.4
- [Qemu-devel] [PULL v2 34/70] target/s390x: Implement CSPG, (continued)
- [Qemu-devel] [PULL v2 34/70] target/s390x: Implement CSPG, Richard Henderson, 2017/06/06
- [Qemu-devel] [PULL v2 33/70] target/s390x: Use atomic operations for COMPARE SWAP PURGE, Richard Henderson, 2017/06/06
- [Qemu-devel] [PULL v2 36/70] target/s390x: End the TB after EXECUTE, Richard Henderson, 2017/06/06
- [Qemu-devel] [PULL v2 37/70] target/s390x: Implement EXECUTE via new TranslationBlock, Richard Henderson, 2017/06/06
- [Qemu-devel] [PULL v2 35/70] target/s390x: Save current ilen during translation, Richard Henderson, 2017/06/06
- [Qemu-devel] [PULL v2 38/70] target/s390x: Re-implement a few EXECUTE target insns directly, Richard Henderson, 2017/06/06
- [Qemu-devel] [PULL v2 40/70] target/s390x: remove dead code in translate.c, Richard Henderson, 2017/06/06
- [Qemu-devel] [PULL v2 41/70] target/s390x: remove some Linux assumptions from IPTE, Richard Henderson, 2017/06/06
- [Qemu-devel] [PULL v2 39/70] target/s390x/cpu_models: Allow some additional feature bits for the "qemu" CPU, Richard Henderson, 2017/06/06
- [Qemu-devel] [PULL v2 43/70] target/s390x: implement TEST AND SET, Richard Henderson, 2017/06/06
- [Qemu-devel] [PULL v2 42/70] target/s390x: implement local-TLB-clearing in IPTE,
Richard Henderson <=
- [Qemu-devel] [PULL v2 44/70] target/s390x: implement TEST ADDRESSING MODE, Richard Henderson, 2017/06/06
- [Qemu-devel] [PULL v2 45/70] target/s390x: implement PACK, Richard Henderson, 2017/06/06
- [Qemu-devel] [PULL v2 46/70] target/s390x: implement COMPARE AND SIGNAL, Richard Henderson, 2017/06/06
- [Qemu-devel] [PULL v2 48/70] target/s390x: implement MOVE NUMERICS, Richard Henderson, 2017/06/06
- [Qemu-devel] [PULL v2 47/70] target/s390x: implement MOVE INVERSE, Richard Henderson, 2017/06/06
- [Qemu-devel] [PULL v2 49/70] target/s390x: implement MOVE WITH OFFSET, Richard Henderson, 2017/06/06
- [Qemu-devel] [PULL v2 50/70] target/s390x: implement MOVE ZONES, Richard Henderson, 2017/06/06
- [Qemu-devel] [PULL v2 51/70] target/s390x: improve 24-bit and 31-bit addresses read, Richard Henderson, 2017/06/06
- [Qemu-devel] [PULL v2 54/70] target/s390x: fix COMPARE LOGICAL LONG EXTENDED, Richard Henderson, 2017/06/06
- [Qemu-devel] [PULL v2 52/70] target/s390x: improve 24-bit and 31-bit addresses write, Richard Henderson, 2017/06/06