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Re: [Qemu-devel] [PATCH risu v2] ppc64: Fix patterns for rotate doublewo


From: Peter Maydell
Subject: Re: [Qemu-devel] [PATCH risu v2] ppc64: Fix patterns for rotate doubleword instructions
Date: Tue, 30 May 2017 17:37:56 +0100

On 30 May 2017 at 16:39, Peter Maydell <address@hidden> wrote:
> On 30 May 2017 at 16:26, Nikunj A Dadhania <address@hidden> wrote:
>> Sandipan Das <address@hidden> writes:
>>
>>> The patterns for the following instructions are fixed:
>>>  * Rotate Left Doubleword then Clear Right (rldcr[.])
>>>  * Rotate Left Doubleword Immediate then Clear Right (rldicr[.])
>>>  * Rotate Left Doubleword Immediate then Mask Insert (rldimi[.])
>>>
>>> The first instruction has a typo. For the other two instructions,
>>> the extended opcodes are incorrect and the shift field 'sha' is
>>> absent. Also, the shift field 'sh' should be used in place of the
>>> register field 'rb'.
>>>
>>> Signed-off-by: Sandipan Das <address@hidden>
>>
>> Reviewed-by: Nikunj A Dadhania <address@hidden>
>
> Thanks; applied to risu master.

...but I foolishly didn't run build-all-archs first, which
points out that there's a bug:
Syntax error detected evaluating RLDIMId PPC64LE constraints string:         ]
{ $rs != 1 && $ra != 1 && $rb != 1 && $rs != 13 && $ra != 13 && $rb != 13; }
Global symbol "$rb" requires explicit package name (did you forget to
declare "my $rb"?) at (eval 429) line 1.
Global symbol "$rb" requires explicit package name (did you forget to
declare "my $rb"?) at (eval 429) line 1.

You forgot to update the constraints when you changed the
field names... I think that the constraints on $rb should
be removed rather than just changed to use $sh because this
field is an immediate, not a register number, so we don't need
to make it avoid 1 and 13. This would bring them into line with
the other rotate-immediates. I'll post a patch in a second.

thanks
-- PMM



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