[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 1/2] target-s390x: Mask the SIGP order_code to 8bit.
From: |
Alexander Graf |
Subject: |
[Qemu-devel] [PULL 1/2] target-s390x: Mask the SIGP order_code to 8bit. |
Date: |
Tue, 25 Apr 2017 13:44:49 +0200 |
From: Philipp Kern <address@hidden>
According to "CPU Signaling and Response", "Signal-Processor Orders",
the order field is bit position 56-63. Without this, the Linux
guest kernel is sometimes unable to stop emulation and enters
an infinite loop of "XXX unknown sigp: 0xffffffff00000005".
Signed-off-by: Philipp Kern <address@hidden>
Reviewed-by: Thomas Huth <address@hidden>
[agraf: add comment according to email]
Signed-off-by: Alexander Graf <address@hidden>
---
target/s390x/misc_helper.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/s390x/misc_helper.c b/target/s390x/misc_helper.c
index 93b0e61..83d3894 100644
--- a/target/s390x/misc_helper.c
+++ b/target/s390x/misc_helper.c
@@ -515,7 +515,8 @@ uint32_t HELPER(sigp)(CPUS390XState *env, uint64_t
order_code, uint32_t r1,
/* Remember: Use "R1 or R1 + 1, whichever is the odd-numbered register"
as parameter (input). Status (output) is always R1. */
- switch (order_code) {
+ /* sigp contains the order code in bit positions 56-63, mask it here. */
+ switch (order_code & 0xff) {
case SIGP_SET_ARCH:
/* switch arch */
break;
--
1.8.5.6