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[Qemu-devel] [PULL 13/24] cadence_gem: Correct the interupt logic
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 13/24] cadence_gem: Correct the interupt logic |
Date: |
Thu, 20 Apr 2017 17:40:59 +0100 |
From: Alistair Francis <address@hidden>
This patch fixes two mistakes in the interrupt logic.
First we only trigger single-queue or multi-queue interrupts if the status
register is set. This logic was already used for non multi-queue interrupts
but it also applies to multi-queue interrupts.
Secondly we need to lower the interrupts if the ISR isn't set. As part
of this we can remove the other interrupt lowering logic and consolidate
it inside gem_update_int_status().
Signed-off-by: Alistair Francis <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
---
hw/net/cadence_gem.c | 18 +++++++++++++-----
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
index a66a9cc..e1962e1 100644
--- a/hw/net/cadence_gem.c
+++ b/hw/net/cadence_gem.c
@@ -509,7 +509,18 @@ static void gem_update_int_status(CadenceGEMState *s)
{
int i;
- if ((s->num_priority_queues == 1) && s->regs[GEM_ISR]) {
+ if (!s->regs[GEM_ISR]) {
+ /* ISR isn't set, clear all the interrupts */
+ for (i = 0; i < s->num_priority_queues; ++i) {
+ qemu_set_irq(s->irq[i], 0);
+ }
+ return;
+ }
+
+ /* If we get here we know s->regs[GEM_ISR] is set, so we don't need to
+ * check it again.
+ */
+ if (s->num_priority_queues == 1) {
/* No priority queues, just trigger the interrupt */
DB_PRINT("asserting int.\n");
qemu_set_irq(s->irq[0], 1);
@@ -1274,7 +1285,6 @@ static uint64_t gem_read(void *opaque, hwaddr offset,
unsigned size)
{
CadenceGEMState *s;
uint32_t retval;
- int i;
s = (CadenceGEMState *)opaque;
offset >>= 2;
@@ -1285,9 +1295,7 @@ static uint64_t gem_read(void *opaque, hwaddr offset,
unsigned size)
switch (offset) {
case GEM_ISR:
DB_PRINT("lowering irqs on ISR read\n");
- for (i = 0; i < s->num_priority_queues; ++i) {
- qemu_set_irq(s->irq[i], 0);
- }
+ /* The interrupts get updated at the end of the function. */
break;
case GEM_PHYMNTNC:
if (retval & GEM_PHYMNTNC_OP_R) {
--
2.7.4
- [Qemu-devel] [PULL 19/24] arm: Move gen_set_condexec() and gen_set_pc_im() up in the file, (continued)
- [Qemu-devel] [PULL 19/24] arm: Move gen_set_condexec() and gen_set_pc_im() up in the file, Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 14/24] cadence_gem: Make the revision a property, Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 20/24] arm: Move condition-failed codepath generation out of if(), Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 11/24] cadence_gem: Read the correct queue descriptor, Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 09/24] arm/kvm: Remove trailing newlines from error_report(), Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 03/24] hw/char/exynos4210_uart: Constify static array and few arguments, Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 08/24] stellaris: Don't hw_error() on bad register accesses, Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 05/24] target/arm: Add missing entries to excnames[] for log strings, Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 02/24] hw/arm/exynos: Convert fprintf to qemu_log_mask/error_report, Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 01/24] hw/arm/boot: take Linux/arm64 TEXT_OFFSET header field into account, Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 13/24] cadence_gem: Correct the interupt logic,
Peter Maydell <=
- [Qemu-devel] [PULL 21/24] arm: Abstract out "are we singlestepping" test to utility function, Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 22/24] arm: Track M profile handler mode state in TB flags, Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 24/24] arm: Remove workarounds for old M-profile exception return implementation, Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 07/24] target/arm: Add assertion about FSC format for syndrome registers, Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 10/24] hw/arm: Qomify pxa2xx.c, Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 04/24] hw/misc/exynos4210_pmu: Reorder local variables for readability, Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 23/24] arm: Implement M profile exception return properly, Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 06/24] arm: Move excnames[] array into arm_log_exceptions(), Peter Maydell, 2017/04/20
- Re: [Qemu-devel] [PULL 00/24] target-arm queue, Peter Maydell, 2017/04/20