[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [Qemu-ppc] [PATCH v1] target/ppc: rewrite f[n]m[add, su
From: |
Nikunj Dadhania |
Subject: |
Re: [Qemu-devel] [Qemu-ppc] [PATCH v1] target/ppc: rewrite f[n]m[add, sub] using float64_muladd |
Date: |
Thu, 2 Mar 2017 09:38:14 +0530 |
On 02-Mar-2017 7:53 AM, "Richard Henderson" <address@hidden> wrote:
On 03/02/2017 11:29 AM, David Gibson wrote:
> On Wed, Mar 01, 2017 at 08:54:14PM +0530, Nikunj A Dadhania wrote:
>
>> Use the softfloat api for fused multiply-add. Also, generate VXISI using
>> a helper function by computing intermediate result.
>>
>
> Um.. I really need some information on why this is a good thing to
> do. Is it a bugfix? Enhancement? Simplification?
>
Looks like a bugfix to me. Previously we were attempting the operation via
float128 as an intermediate type, which can result in double rounding
errors.
Was discussed here
https://lists.gnu.org/archive/html/qemu-devel/2016-10/msg02000.html
Nikunj