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[Qemu-devel] [PULL 06/30] sd: sdhci: Remove block count enable check in
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 06/30] sd: sdhci: Remove block count enable check in single block transfers |
Date: |
Mon, 27 Feb 2017 18:04:35 +0000 |
From: Prasad J Pandit <address@hidden>
In SDHCI protocol, the 'Block count enable' bit of the Transfer
Mode register is relevant only in multi block transfers. We need
not check it in single block transfers.
Signed-off-by: Prasad J Pandit <address@hidden>
Message-id: address@hidden
Reviewed-by: Alistair Francis <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
hw/sd/sdhci.c | 6 +-----
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index c270e09..6d6a791 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -570,7 +570,6 @@ static void sdhci_sdma_transfer_multi_blocks(SDHCIState *s)
}
/* single block SDMA transfer */
-
static void sdhci_sdma_transfer_single_block(SDHCIState *s)
{
int n;
@@ -589,10 +588,7 @@ static void sdhci_sdma_transfer_single_block(SDHCIState *s)
sdbus_write_data(&s->sdbus, s->fifo_buffer[n]);
}
}
-
- if (s->trnmod & SDHC_TRNS_BLK_CNT_EN) {
- s->blkcnt--;
- }
+ s->blkcnt--;
sdhci_end_transfer(s);
}
--
2.7.4
- [Qemu-devel] [PULL 16/30] arm: gic: Remove references to NVIC, (continued)
- [Qemu-devel] [PULL 16/30] arm: gic: Remove references to NVIC, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 01/30] target-arm: Implement BCM2835 hardware RNG, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 10/30] hw/arm/virt: Add a user option to disallow ITS instantiation, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 08/30] Add missing fp_access_check() to aarch64 crypto instructions, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 23/30] armv7m: Raise correct kind of UsageFault for attempts to execute ARM code, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 07/30] hw/arm/virt: fix cpu object reference leak, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 25/30] bcm2835_sdhost: add bcm2835 sdhost controller, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 05/30] sd: sdhci: conditionally invoke multi block transfer, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 30/30] hw/arm/exynos: Fix proper mapping of CPUs by providing real cluster ID, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 02/30] bcm2835_rng: Use qcrypto_random_bytes() rather than rand(), Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 06/30] sd: sdhci: Remove block count enable check in single block transfers,
Peter Maydell <=
- [Qemu-devel] [PULL 13/30] armv7m: Implement reading and writing of PRIGROUP, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 11/30] ARM i.MX timers: fix reset handling, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 27/30] bcm2835_gpio: add bcm2835 gpio controller, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 04/30] sd: sdhci: check transfer mode register in multi block transfer, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 03/30] sd: sdhci: mask transfer mode register value, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 29/30] hw/arm/exynos: Fix Linux kernel division by zero for PLLs, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 09/30] cputlb: Don't assume do_unassigned_access() never returns, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 14/30] armv7m: Rewrite NVIC to not use any GIC code, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 28/30] bcm2835: add sdhost and gpio controllers, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 12/30] armv7m: Rename nvic_state to NVICState, Peter Maydell, 2017/02/27