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[Qemu-devel] [PULL 12/24] tcg: handle EXCP_ATOMIC exception for system e
From: |
Alex Bennée |
Subject: |
[Qemu-devel] [PULL 12/24] tcg: handle EXCP_ATOMIC exception for system emulation |
Date: |
Fri, 24 Feb 2017 11:20:57 +0000 |
From: Pranith Kumar <address@hidden>
The patch enables handling atomic code in the guest. This should be
preferably done in cpu_handle_exception(), but the current assumptions
regarding when we can execute atomic sections cause a deadlock.
The current mechanism discards the flags which were set in atomic
execution. We ensure they are properly saved by calling the
cc->cpu_exec_enter/leave() functions around the loop.
As we are running cpu_exec_step_atomic() from the outermost loop we
need to avoid an abort() when single stepping over atomic code since
debug exception longjmp will point to the the setlongjmp in
cpu_exec(). We do this by setting a new jmp_env so that it jumps back
here on an exception.
Signed-off-by: Pranith Kumar <address@hidden>
[AJB: tweak title, merge with new patches, add mmap_lock]
Signed-off-by: Alex Bennée <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
CC: Paolo Bonzini <address@hidden>
---
cpu-exec.c | 43 +++++++++++++++++++++++++++++++------------
cpus.c | 9 +++++++++
2 files changed, 40 insertions(+), 12 deletions(-)
diff --git a/cpu-exec.c b/cpu-exec.c
index 2edd26e823..1a5ad4889d 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -228,24 +228,43 @@ static void cpu_exec_nocache(CPUState *cpu, int
max_cycles,
static void cpu_exec_step(CPUState *cpu)
{
+ CPUClass *cc = CPU_GET_CLASS(cpu);
CPUArchState *env = (CPUArchState *)cpu->env_ptr;
TranslationBlock *tb;
target_ulong cs_base, pc;
uint32_t flags;
cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
- tb_lock();
- tb = tb_gen_code(cpu, pc, cs_base, flags,
- 1 | CF_NOCACHE | CF_IGNORE_ICOUNT);
- tb->orig_tb = NULL;
- tb_unlock();
- /* execute the generated code */
- trace_exec_tb_nocache(tb, pc);
- cpu_tb_exec(cpu, tb);
- tb_lock();
- tb_phys_invalidate(tb, -1);
- tb_free(tb);
- tb_unlock();
+ if (sigsetjmp(cpu->jmp_env, 0) == 0) {
+ mmap_lock();
+ tb_lock();
+ tb = tb_gen_code(cpu, pc, cs_base, flags,
+ 1 | CF_NOCACHE | CF_IGNORE_ICOUNT);
+ tb->orig_tb = NULL;
+ tb_unlock();
+ mmap_unlock();
+
+ cc->cpu_exec_enter(cpu);
+ /* execute the generated code */
+ trace_exec_tb_nocache(tb, pc);
+ cpu_tb_exec(cpu, tb);
+ cc->cpu_exec_exit(cpu);
+
+ tb_lock();
+ tb_phys_invalidate(tb, -1);
+ tb_free(tb);
+ tb_unlock();
+ } else {
+ /* We may have exited due to another problem here, so we need
+ * to reset any tb_locks we may have taken but didn't release.
+ * The mmap_lock is dropped by tb_gen_code if it runs out of
+ * memory.
+ */
+#ifndef CONFIG_SOFTMMU
+ tcg_debug_assert(!have_mmap_lock());
+#endif
+ tb_lock_reset();
+ }
}
void cpu_exec_step_atomic(CPUState *cpu)
diff --git a/cpus.c b/cpus.c
index bfee326d30..8200ac6b75 100644
--- a/cpus.c
+++ b/cpus.c
@@ -1348,6 +1348,11 @@ static void *qemu_tcg_rr_cpu_thread_fn(void *arg)
if (r == EXCP_DEBUG) {
cpu_handle_guest_debug(cpu);
break;
+ } else if (r == EXCP_ATOMIC) {
+ qemu_mutex_unlock_iothread();
+ cpu_exec_step_atomic(cpu);
+ qemu_mutex_lock_iothread();
+ break;
}
} else if (cpu->stop) {
if (cpu->unplug) {
@@ -1458,6 +1463,10 @@ static void *qemu_tcg_cpu_thread_fn(void *arg)
*/
g_assert(cpu->halted);
break;
+ case EXCP_ATOMIC:
+ qemu_mutex_unlock_iothread();
+ cpu_exec_step_atomic(cpu);
+ qemu_mutex_lock_iothread();
default:
/* Ignore everything else? */
break;
--
2.11.0
- [Qemu-devel] [PULL 03/24] mttcg: Add missing tb_lock/unlock() in cpu_exec_step(), (continued)
- [Qemu-devel] [PULL 03/24] mttcg: Add missing tb_lock/unlock() in cpu_exec_step(), Alex Bennée, 2017/02/24
- [Qemu-devel] [PULL 04/24] tcg: move TCG_MO/BAR types into own file, Alex Bennée, 2017/02/24
- [Qemu-devel] [PULL 06/24] tcg: add kick timer for single-threaded vCPU emulation, Alex Bennée, 2017/02/24
- [Qemu-devel] [PULL 01/24] docs: new design document multi-thread-tcg.txt, Alex Bennée, 2017/02/24
- [Qemu-devel] [PULL 05/24] tcg: add options for enabling MTTCG, Alex Bennée, 2017/02/24
- [Qemu-devel] [PULL 07/24] tcg: rename tcg_current_cpu to tcg_current_rr_cpu, Alex Bennée, 2017/02/24
- [Qemu-devel] [PULL 10/24] tcg: enable tb_lock() for SoftMMU, Alex Bennée, 2017/02/24
- [Qemu-devel] [PULL 11/24] tcg: enable thread-per-vCPU, Alex Bennée, 2017/02/24
- [Qemu-devel] [PULL 08/24] tcg: drop global lock during TCG code execution, Alex Bennée, 2017/02/24
- [Qemu-devel] [PULL 09/24] tcg: remove global exit_request, Alex Bennée, 2017/02/24
- [Qemu-devel] [PULL 12/24] tcg: handle EXCP_ATOMIC exception for system emulation,
Alex Bennée <=
- [Qemu-devel] [PULL 14/24] cputlb: tweak qemu_ram_addr_from_host_nofail reporting, Alex Bennée, 2017/02/24
- [Qemu-devel] [PULL 13/24] cputlb: add assert_cpu_is_self checks, Alex Bennée, 2017/02/24
- [Qemu-devel] [PULL 15/24] cputlb: introduce tlb_flush_* async work., Alex Bennée, 2017/02/24
- [Qemu-devel] [PULL 17/24] cputlb: add tlb_flush_by_mmuidx async routines, Alex Bennée, 2017/02/24
- [Qemu-devel] [PULL 22/24] target-arm: ensure all cross vCPUs TLB flushes complete, Alex Bennée, 2017/02/24
- [Qemu-devel] [PULL 18/24] cputlb: atomically update tlb fields used by tlb_reset_dirty, Alex Bennée, 2017/02/24
- [Qemu-devel] [PULL 24/24] tcg: enable MTTCG by default for ARM on x86 hosts, Alex Bennée, 2017/02/24
- [Qemu-devel] [PULL 23/24] hw/misc/imx6_src: defer clearing of SRC_SCR reset bits, Alex Bennée, 2017/02/24
- [Qemu-devel] [PULL 20/24] target-arm/powerctl: defer cpu reset work to CPU context, Alex Bennée, 2017/02/24
- [Qemu-devel] [PULL 16/24] cputlb and arm/sparc targets: convert mmuidx flushes from varg to bitmap, Alex Bennée, 2017/02/24