Re: [Qemu-devel] [PATCH 0/2] sd: sdhci: correct transfer mode register usage

[P J P]

+-- On Tue, 7 Feb 2017, Alistair Francis wrote --+
| > ===
| > diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
| > index d921423..7f3d547 100644
| > --- a/hw/sd/sdhci.c
| > +++ b/hw/sd/sdhci.c
| > @@ -1019,7 +1019,11 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t 
val,
| > unsigned size)
| >          /* Writing to last byte of sdmasysad might trigger transfer */
| >          if (!(mask & 0xFF000000) && TRANSFERRING_DATA(s->prnsts) && 
s->blkcnt
| > &&
| >                  s->blksize && SDHC_DMA_TYPE(s->hostctl) == SDHC_CTRL_SDMA) 
{
| > -            sdhci_sdma_transfer_multi_blocks(s);
| > +            if (!(s->trnmod & SDHC_TRNS_MULTI)) {
| > +                sdhci_sdma_transfer_single_block(s);
| > +            } else {
| > +                sdhci_sdma_transfer_multi_blocks(s);
| > +            }
| >          }
| >          break;
| >      case SDHC_BLKSIZE:
| > ===
| 
| Should this be a third patch or is this in a different series?

  Yes, a third patch in the series; If it is required.

Thank you.
--
Prasad J Pandit / Red Hat Product Security Team
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