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[Qemu-devel] [PULL 016/107] pseries: Make cpu_update during CAS uncondit
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 016/107] pseries: Make cpu_update during CAS unconditional |
Date: |
Thu, 2 Feb 2017 16:13:14 +1100 |
spapr_h_cas_compose_response() includes a cpu_update parameter which
controls whether it includes updated information on the CPUs in the device
tree fragment returned from the ibm,client-architecture-support (CAS) call.
Providing the updated information is essential when CAS has negotiated
compatibility options which require different cpu information to be
presented to the guest. However, it should be safe to provide in other
cases (it will just override the existing data in the device tree with
identical data). This simplifies the code by removing the parameter and
always providing the cpu update information.
Signed-off-by: David Gibson <address@hidden>
Reviewed-by: Alexey Kardashevskiy <address@hidden>
---
hw/ppc/spapr.c | 5 +----
hw/ppc/spapr_hcall.c | 8 ++------
include/hw/ppc/spapr.h | 1 -
3 files changed, 3 insertions(+), 11 deletions(-)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index cef696c..ca78e31 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -685,7 +685,6 @@ out:
int spapr_h_cas_compose_response(sPAPRMachineState *spapr,
target_ulong addr, target_ulong size,
- bool cpu_update,
sPAPROptionVector *ov5_updates)
{
void *fdt, *fdt_skel;
@@ -704,9 +703,7 @@ int spapr_h_cas_compose_response(sPAPRMachineState *spapr,
g_free(fdt_skel);
/* Fixup cpu nodes */
- if (cpu_update) {
- _FDT((spapr_fixup_cpu_dt(fdt, spapr)));
- }
+ _FDT((spapr_fixup_cpu_dt(fdt, spapr)));
if (spapr_dt_cas_updates(spapr, fdt, ov5_updates)) {
return -1;
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index b2a8e48..1333110 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -945,7 +945,7 @@ static target_ulong
h_client_architecture_support(PowerPCCPU *cpu_,
target_ulong ov_table;
PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu_);
CPUState *cs;
- bool cpu_match = false, cpu_update = true;
+ bool cpu_match = false;
unsigned old_cpu_version = cpu_->cpu_version;
unsigned compat_lvl = 0, cpu_version = 0;
unsigned max_lvl = get_compat_level(cpu_->max_compat);
@@ -999,10 +999,6 @@ static target_ulong
h_client_architecture_support(PowerPCCPU *cpu_,
}
}
- if (!cpu_version) {
- cpu_update = false;
- }
-
/* For the future use: here @ov_table points to the first option vector */
ov_table = list;
@@ -1028,7 +1024,7 @@ static target_ulong
h_client_architecture_support(PowerPCCPU *cpu_,
if (!spapr->cas_reboot) {
spapr->cas_reboot =
- (spapr_h_cas_compose_response(spapr, args[1], args[2], cpu_update,
+ (spapr_h_cas_compose_response(spapr, args[1], args[2],
ov5_updates) != 0);
}
spapr_ovec_cleanup(ov5_updates);
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index f8d444d..04d2821 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -589,7 +589,6 @@ void spapr_events_init(sPAPRMachineState *sm);
void spapr_dt_events(sPAPRMachineState *sm, void *fdt);
int spapr_h_cas_compose_response(sPAPRMachineState *sm,
target_ulong addr, target_ulong size,
- bool cpu_update,
sPAPROptionVector *ov5_updates);
sPAPRTCETable *spapr_tce_new_table(DeviceState *owner, uint32_t liobn);
void spapr_tce_table_enable(sPAPRTCETable *tcet,
--
2.9.3
- [Qemu-devel] [PULL 007/107] target-ppc: implement lxsd and lxssp instructions, (continued)
- [Qemu-devel] [PULL 007/107] target-ppc: implement lxsd and lxssp instructions, David Gibson, 2017/02/02
- [Qemu-devel] [PULL 002/107] target-ppc: Consolidate instruction decode helpers, David Gibson, 2017/02/02
- [Qemu-devel] [PULL 011/107] target-ppc: Implement bcdctsq. instruction, David Gibson, 2017/02/02
- [Qemu-devel] [PULL 005/107] target-ppc: Add xscmpexp[dp, qp] instructions, David Gibson, 2017/02/02
- [Qemu-devel] [PULL 009/107] target-ppc: implement lxv/lxvx and stxv/stxvx, David Gibson, 2017/02/02
- [Qemu-devel] [PULL 020/107] target-ppc: move ppc_vsr_t to common header, David Gibson, 2017/02/02
- [Qemu-devel] [PULL 024/107] target-ppc: implement xsnegqp instruction, David Gibson, 2017/02/02
- [Qemu-devel] [PULL 019/107] ppc/spapr: implement H_SIGNAL_SYS_RESET, David Gibson, 2017/02/02
- [Qemu-devel] [PULL 015/107] pseries: Always use core objects for CPU construction, David Gibson, 2017/02/02
- [Qemu-devel] [PULL 017/107] ppc: Clean up and QOMify hypercall emulation, David Gibson, 2017/02/02
- [Qemu-devel] [PULL 016/107] pseries: Make cpu_update during CAS unconditional,
David Gibson <=
- [Qemu-devel] [PULL 013/107] target-ppc: Implement bcdsetsgn. instruction, David Gibson, 2017/02/02
- [Qemu-devel] [PULL 012/107] target-ppc: Implement bcdcpsgn. instruction, David Gibson, 2017/02/02
- [Qemu-devel] [PULL 021/107] target-ppc: implement stop instruction, David Gibson, 2017/02/02
- [Qemu-devel] [PULL 022/107] target-ppc: implement xsabsqp/xsnabsqp instruction, David Gibson, 2017/02/02
- [Qemu-devel] [PULL 025/107] target-ppc: implement xscpsgnqp instruction, David Gibson, 2017/02/02
- [Qemu-devel] [PULL 018/107] ppc: Rename cpu_version to compat_pvr, David Gibson, 2017/02/02
- [Qemu-devel] [PULL 029/107] target-ppc: implement stxvl instruction, David Gibson, 2017/02/02
- [Qemu-devel] [PULL 043/107] hw/ppc: QOM'ify e500.c, David Gibson, 2017/02/02
- [Qemu-devel] [PULL 044/107] hw/ppc: QOM'ify ppce500_spin.c, David Gibson, 2017/02/02
- [Qemu-devel] [PULL 045/107] hw/ppc: QOM'ify spapr_vio.c, David Gibson, 2017/02/02