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[Qemu-devel] [PULL 10/30] target-sparc: hypervisor mode takes over nucle
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL 10/30] target-sparc: hypervisor mode takes over nucleus mode |
Date: |
Wed, 11 Jan 2017 18:55:46 -0800 |
From: Artyom Tarasenko <address@hidden>
Accordinf to UA2005, 9.3.3 "Address Space Identifiers",
"In hyperprivileged mode, all instruction fetches and loads and stores with
implicit
ASIs use a physical address, regardless of the value of TL".
Signed-off-by: Artyom Tarasenko <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target/sparc/cpu.h | 4 ++--
target/sparc/translate.c | 6 +++++-
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index 113ae33..4f709e1 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -716,10 +716,10 @@ static inline int cpu_mmu_index(CPUSPARCState *env, bool
ifetch)
? (env->lsu & IMMU_E) == 0 || (env->pstate & PS_RED) != 0
: (env->lsu & DMMU_E) == 0) {
return MMU_PHYS_IDX;
- } else if (env->tl > 0) {
- return MMU_NUCLEUS_IDX;
} else if (cpu_hypervisor_mode(env)) {
return MMU_HYPV_IDX;
+ } else if (env->tl > 0) {
+ return MMU_NUCLEUS_IDX;
} else if (cpu_supervisor_mode(env)) {
return MMU_KERNEL_IDX;
} else {
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index b898898..82f9965 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -2142,7 +2142,11 @@ static DisasASI get_asi(DisasContext *dc, int insn,
TCGMemOp memop)
case ASI_TWINX_NL:
case ASI_NUCLEUS_QUAD_LDD:
case ASI_NUCLEUS_QUAD_LDD_L:
- mem_idx = MMU_NUCLEUS_IDX;
+ if (hypervisor(dc)) {
+ mem_idx = MMU_HYPV_IDX;
+ } else {
+ mem_idx = MMU_NUCLEUS_IDX;
+ }
break;
case ASI_AIUP: /* As if user primary */
case ASI_AIUPL: /* As if user primary LE */
--
2.9.3
- [Qemu-devel] [PULL 00/30] target-sparc sun4v support, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 01/30] target-sparc: ignore MMU-faults if MMU is disabled in hypervisor mode, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 02/30] target-sparc: store cpu super- and hypervisor flags in TB, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 03/30] target-sparc: use explicit mmu register pointers, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 04/30] target-sparc: add UA2005 TTE bit #defines, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 05/30] target-sparc: add UltraSPARC T1 TLB #defines, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 06/30] target-sparc: on UA2005 don't deliver Interrupt_level_n IRQs in hypervisor mode, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 07/30] target-sparc: simplify replace_tlb_entry by using TTE_PGSIZE, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 08/30] target-sparc: implement UA2005 scratchpad registers, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 09/30] target-sparc: implement UltraSPARC-T1 Strand status ASR, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 10/30] target-sparc: hypervisor mode takes over nucleus mode,
Richard Henderson <=
- [Qemu-devel] [PULL 11/30] target-sparc: implement UA2005 hypervisor traps, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 12/30] target-sparc: implement UA2005 GL register, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 13/30] target-sparc: implement UA2005 rdhpstate and wrhpstate instructions, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 14/30] target-sparc: fix immediate UA2005 traps, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 15/30] target-sparc: use direct address translation in hyperprivileged mode, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 16/30] target-sparc: allow priveleged ASIs in hyperprivileged mode, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 17/30] target-sparc: ignore writes to UA2005 CPU mondo queue register, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 18/30] target-sparc: replace the last tlb entry when no free entries left, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 19/30] target-sparc: use SparcV9MMU type for sparc64 I/D-MMUs, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 20/30] target-sparc: implement UA2005 TSB Pointers, Richard Henderson, 2017/01/11