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[Qemu-devel] [PATCH v6 7/7] trace: [trivial] Statically enable all guest
From: |
Lluís Vilanova |
Subject: |
[Qemu-devel] [PATCH v6 7/7] trace: [trivial] Statically enable all guest events |
Date: |
Wed, 28 Dec 2016 19:41:32 +0100 |
User-agent: |
StGit/0.17.1-dirty |
The optimizations of this series makes it feasible to have them
available on all builds.
Signed-off-by: Lluís Vilanova <address@hidden>
---
trace-events | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/trace-events b/trace-events
index f74e1d3d22..0a0f4d9cd6 100644
--- a/trace-events
+++ b/trace-events
@@ -159,7 +159,7 @@ vcpu guest_cpu_reset(void)
#
# Mode: user, softmmu
# Targets: TCG(all)
-disable vcpu tcg guest_mem_before(TCGv vaddr, uint8_t info) "info=%d",
"vaddr=0x%016"PRIx64" info=%d"
+vcpu tcg guest_mem_before(TCGv vaddr, uint8_t info) "info=%d",
"vaddr=0x%016"PRIx64" info=%d"
# @num: System call number.
# @arg*: System call argument value.
@@ -168,7 +168,7 @@ disable vcpu tcg guest_mem_before(TCGv vaddr, uint8_t info)
"info=%d", "vaddr=0x
#
# Mode: user
# Targets: TCG(all)
-disable vcpu guest_user_syscall(uint64_t num, uint64_t arg1, uint64_t arg2,
uint64_t arg3, uint64_t arg4, uint64_t arg5, uint64_t arg6, uint64_t arg7,
uint64_t arg8) "num=0x%016"PRIx64" arg1=0x%016"PRIx64" arg2=0x%016"PRIx64"
arg3=0x%016"PRIx64" arg4=0x%016"PRIx64" arg5=0x%016"PRIx64" arg6=0x%016"PRIx64"
arg7=0x%016"PRIx64" arg8=0x%016"PRIx64
+vcpu guest_user_syscall(uint64_t num, uint64_t arg1, uint64_t arg2, uint64_t
arg3, uint64_t arg4, uint64_t arg5, uint64_t arg6, uint64_t arg7, uint64_t
arg8) "num=0x%016"PRIx64" arg1=0x%016"PRIx64" arg2=0x%016"PRIx64"
arg3=0x%016"PRIx64" arg4=0x%016"PRIx64" arg5=0x%016"PRIx64" arg6=0x%016"PRIx64"
arg7=0x%016"PRIx64" arg8=0x%016"PRIx64
# @num: System call number.
# @ret: System call result value.
@@ -177,4 +177,4 @@ disable vcpu guest_user_syscall(uint64_t num, uint64_t
arg1, uint64_t arg2, uint
#
# Mode: user
# Targets: TCG(all)
-disable vcpu guest_user_syscall_ret(uint64_t num, uint64_t ret)
"num=0x%016"PRIx64" ret=0x%016"PRIx64
+vcpu guest_user_syscall_ret(uint64_t num, uint64_t ret) "num=0x%016"PRIx64"
ret=0x%016"PRIx64
- [Qemu-devel] [PATCH v6 0/7] trace: [tcg] Optimize per-vCPU tracing states with separate TB caches, Lluís Vilanova, 2016/12/28
- [Qemu-devel] [PATCH v6 1/7] exec: [tcg] Refactor flush of per-CPU virtual TB cache, Lluís Vilanova, 2016/12/28
- [Qemu-devel] [PATCH v6 2/7] trace: Make trace_get_vcpu_event_count() inlinable, Lluís Vilanova, 2016/12/28
- [Qemu-devel] [PATCH v6 3/7] trace: [tcg] Delay changes to dynamic state when translating, Lluís Vilanova, 2016/12/28
- [Qemu-devel] [PATCH v6 4/7] exec: [tcg] Use different TBs according to the vCPU's dynamic tracing state, Lluís Vilanova, 2016/12/28
- [Qemu-devel] [PATCH v6 5/7] trace: [tcg] Do not generate TCG code to trace dinamically-disabled events, Lluís Vilanova, 2016/12/28
- [Qemu-devel] [PATCH v6 7/7] trace: [trivial] Statically enable all guest events,
Lluís Vilanova <=
- [Qemu-devel] [PATCH v6 6/7] trace: [tcg, trivial] Re-align generated code, Lluís Vilanova, 2016/12/28