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[Qemu-devel] [PULL 14/25] aspeed: attach the second SPI controller objec
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 14/25] aspeed: attach the second SPI controller object to the SoC |
Date: |
Tue, 27 Dec 2016 15:21:06 +0000 |
From: Cédric Le Goater <address@hidden>
Signed-off-by: Cédric Le Goater <address@hidden>
Reviewed-by: Andrew Jeffery <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/aspeed_soc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
index 3a6b91f..82e2712 100644
--- a/hw/arm/aspeed_soc.c
+++ b/hw/arm/aspeed_soc.c
@@ -124,7 +124,7 @@ static void aspeed_soc_init(Object *obj)
for (i = 0; i < sc->info->spis_num; i++) {
object_initialize(&s->spi[i], sizeof(s->spi[i]),
sc->info->spi_typename[i]);
- object_property_add_child(obj, "spi", OBJECT(&s->spi[i]), NULL);
+ object_property_add_child(obj, "spi[*]", OBJECT(&s->spi[i]), NULL);
qdev_set_parent_bus(DEVICE(&s->spi[i]), sysbus_get_default());
}
--
2.7.4
- [Qemu-devel] [PULL 04/25] target-arm: Fix aarch64 vec_reg_offset, (continued)
- [Qemu-devel] [PULL 04/25] target-arm: Fix aarch64 vec_reg_offset, Peter Maydell, 2016/12/27
- [Qemu-devel] [PULL 05/25] target-arm: Fix aarch64 disas_ldst_single_struct, Peter Maydell, 2016/12/27
- [Qemu-devel] [PULL 06/25] hw/intc/arm_gicv3_common: fix aff3 in typer, Peter Maydell, 2016/12/27
- [Qemu-devel] [PULL 07/25] target-arm: Log AArch64 exception returns, Peter Maydell, 2016/12/27
- [Qemu-devel] [PULL 08/25] hw/intc/arm_gicv3: Remove incorrect usage of fieldoffset, Peter Maydell, 2016/12/27
- [Qemu-devel] [PULL 09/25] hw/intc/arm_gicv3: Don't signal Pending+Active interrupts to CPU, Peter Maydell, 2016/12/27
- [Qemu-devel] [PULL 10/25] hw/arm/virt: add 2.9 machine type, Peter Maydell, 2016/12/27
- [Qemu-devel] [PULL 11/25] m25p80: add support for the mx66l1g45g, Peter Maydell, 2016/12/27
- [Qemu-devel] [PULL 12/25] aspeed: QOMify the CPU object and attach it to the SoC, Peter Maydell, 2016/12/27
- [Qemu-devel] [PULL 13/25] aspeed: remove cannot_destroy_with_object_finalize_yet, Peter Maydell, 2016/12/27
- [Qemu-devel] [PULL 14/25] aspeed: attach the second SPI controller object to the SoC,
Peter Maydell <=
- [Qemu-devel] [PULL 15/25] aspeed: extend the board configuration with flash models, Peter Maydell, 2016/12/27
- [Qemu-devel] [PULL 16/25] aspeed: add support for the romulus-bmc board, Peter Maydell, 2016/12/27
- [Qemu-devel] [PULL 17/25] aspeed: add a memory region for SRAM, Peter Maydell, 2016/12/27
- [Qemu-devel] [PULL 18/25] aspeed: add the definitions for the AST2400 A1 SoC, Peter Maydell, 2016/12/27
- [Qemu-devel] [PULL 19/25] aspeed: change SoC revision of the palmetto-bmc machine, Peter Maydell, 2016/12/27
- [Qemu-devel] [PULL 20/25] aspeed/scu: fix SCU region size, Peter Maydell, 2016/12/27
- [Qemu-devel] [PULL 21/25] aspeed/smc: improve segment register support, Peter Maydell, 2016/12/27
- [Qemu-devel] [PULL 22/25] aspeed/smc: set the number of flash modules for the FMC controller, Peter Maydell, 2016/12/27
- [Qemu-devel] [PULL 23/25] hw/arm: remove trailing whitespace, Peter Maydell, 2016/12/27
- [Qemu-devel] [PULL 24/25] hw/i2c: Add a NULL check for i2c slave init callbacks, Peter Maydell, 2016/12/27