Re: [Qemu-devel] [PATCH v4 04/64] tcg/aarch64: Implement field extraction opcodes

[Alex Bennée]

Richard Henderson <address@hidden> writes:

> On 12/06/2016 04:24 AM, Alex Bennée wrote:
>>> > +    case INDEX_op_extract_i64:
>>> > +    case INDEX_op_extract_i32:
>>> > +        tcg_out_ubfm(s, ext, a0, a1, a2, a2 + args[3] - 1);
>>> > +        break;
>>> > +
>>> > +    case INDEX_op_sextract_i64:
>>> > +    case INDEX_op_sextract_i32:
>>> > +        tcg_out_sbfm(s, ext, a0, a1, a2, a2 + args[3] - 1);
>>> > +        break;
>>> > +
>> This isn't right is it? As I'm reading it extract takes from a
>> offset+len from the source register to low bits of the destination
>> register. The Bitfield Move instructions are the other way around,
>> moving from the low order bits in the source register to an offset+len
>> in the destination.
>>
>
> It is right.  Extract is written as ofs/len in assembly, but encoded as 
> lsb/msb
> in the opcode -- just like bitfield move.
>
> Boot an armv7 guest and there should be enough uses to convince you.

Yeah I got confused by the description and missed that UBFX is an alias
in those cases.

Reviewed-by: Alex Bennée <address@hidden>

--
Alex Bennée