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[Qemu-devel] [kvm-unit-tests PATCH v14 3/5] arm: Add PMU test
From: |
Wei Huang |
Subject: |
[Qemu-devel] [kvm-unit-tests PATCH v14 3/5] arm: Add PMU test |
Date: |
Tue, 6 Dec 2016 12:05:26 -0600 |
From: Christopher Covington <address@hidden>
Beginning with a simple sanity check of the control register, add
a unit test for the ARM Performance Monitors Unit (PMU).
Signed-off-by: Christopher Covington <address@hidden>
Signed-off-by: Wei Huang <address@hidden>
---
arm/Makefile.common | 3 +-
arm/pmu.c | 93 +++++++++++++++++++++++++++++++++++++++++++++++++++++
arm/unittests.cfg | 5 +++
3 files changed, 100 insertions(+), 1 deletion(-)
create mode 100644 arm/pmu.c
diff --git a/arm/Makefile.common b/arm/Makefile.common
index f37b5c2..5da2fdd 100644
--- a/arm/Makefile.common
+++ b/arm/Makefile.common
@@ -12,7 +12,8 @@ endif
tests-common = \
$(TEST_DIR)/selftest.flat \
$(TEST_DIR)/spinlock-test.flat \
- $(TEST_DIR)/pci-test.flat
+ $(TEST_DIR)/pci-test.flat \
+ $(TEST_DIR)/pmu.flat
all: test_cases
diff --git a/arm/pmu.c b/arm/pmu.c
new file mode 100644
index 0000000..bf6ac69
--- /dev/null
+++ b/arm/pmu.c
@@ -0,0 +1,93 @@
+/*
+ * Test the ARM Performance Monitors Unit (PMU).
+ *
+ * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
+ * Copyright (C) 2016, Red Hat Inc, Wei Huang <address@hidden>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU Lesser General Public License version 2.1 and
+ * only version 2.1 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License
+ * for more details.
+ */
+#include "libcflat.h"
+#include "asm/barrier.h"
+#include "asm/sysreg.h"
+#include "asm/processor.h"
+
+#define PMU_PMCR_N_SHIFT 11
+#define PMU_PMCR_N_MASK 0x1f
+#define PMU_PMCR_ID_SHIFT 16
+#define PMU_PMCR_ID_MASK 0xff
+#define PMU_PMCR_IMP_SHIFT 24
+#define PMU_PMCR_IMP_MASK 0xff
+
+#define ID_DFR0_PERFMON_SHIFT 24
+#define ID_DFR0_PERFMON_MASK 0xf
+
+static unsigned int pmu_version;
+#if defined(__arm__)
+#define PMCR __ACCESS_CP15(c9, 0, c12, 0)
+#define ID_DFR0 __ACCESS_CP15(c0, 0, c1, 2)
+
+static inline uint32_t get_id_dfr0(void) { return read_sysreg(ID_DFR0); }
+static inline uint32_t get_pmcr(void) { return read_sysreg(PMCR); }
+#elif defined(__aarch64__)
+static inline uint32_t get_id_dfr0(void) { return read_sysreg(id_dfr0_el1); }
+static inline uint32_t get_pmcr(void) { return read_sysreg(pmcr_el0); }
+#endif
+
+/*
+ * As a simple sanity check on the PMCR_EL0, ensure the implementer field isn't
+ * null. Also print out a couple other interesting fields for diagnostic
+ * purposes. For example, as of fall 2016, QEMU TCG mode doesn't implement
+ * event counters and therefore reports zero event counters, but hopefully
+ * support for at least the instructions event will be added in the future and
+ * the reported number of event counters will become nonzero.
+ */
+static bool check_pmcr(void)
+{
+ uint32_t pmcr;
+
+ pmcr = get_pmcr();
+
+ report_info("PMU implementer/ID code/counters: 0x%x(\"%c\")/0x%x/%d",
+ (pmcr >> PMU_PMCR_IMP_SHIFT) & PMU_PMCR_IMP_MASK,
+ ((pmcr >> PMU_PMCR_IMP_SHIFT) & PMU_PMCR_IMP_MASK) ? : ' ',
+ (pmcr >> PMU_PMCR_ID_SHIFT) & PMU_PMCR_ID_MASK,
+ (pmcr >> PMU_PMCR_N_SHIFT) & PMU_PMCR_N_MASK);
+
+ return ((pmcr >> PMU_PMCR_IMP_SHIFT) & PMU_PMCR_IMP_MASK) != 0;
+}
+
+/* Return FALSE if no PMU found, otherwise return TRUE */
+bool pmu_probe(void)
+{
+ uint32_t dfr0;
+
+ /* probe pmu version */
+ dfr0 = get_id_dfr0();
+ pmu_version = (dfr0 >> ID_DFR0_PERFMON_SHIFT) & ID_DFR0_PERFMON_MASK;
+
+ if (pmu_version)
+ report_info("PMU version: %d", pmu_version);
+
+ return pmu_version;
+}
+
+int main(void)
+{
+ if (!pmu_probe()) {
+ printf("No PMU found, test skipped...\n");
+ return report_summary();
+ }
+
+ report_prefix_push("pmu");
+
+ report("Control register", check_pmcr());
+
+ return report_summary();
+}
diff --git a/arm/unittests.cfg b/arm/unittests.cfg
index ae32a42..816f494 100644
--- a/arm/unittests.cfg
+++ b/arm/unittests.cfg
@@ -58,3 +58,8 @@ groups = selftest
[pci-test]
file = pci-test.flat
groups = pci
+
+# Test PMU support
+[pmu]
+file = pmu.flat
+groups = pmu
--
1.8.3.1
- [Qemu-devel] [kvm-unit-tests PATCH v14 0/5] ARM PMU tests, Wei Huang, 2016/12/06
- [Qemu-devel] [kvm-unit-tests PATCH v14 3/5] arm: Add PMU test,
Wei Huang <=
- [Qemu-devel] [kvm-unit-tests PATCH v14 2/5] arm: Add support for read_sysreg() and write_sysreg(), Wei Huang, 2016/12/06
- [Qemu-devel] [kvm-unit-tests PATCH v14 4/5] arm: pmu: Check cycle count increases, Wei Huang, 2016/12/06
- [Qemu-devel] [kvm-unit-tests PATCH v14 1/5] arm: rename cp15.h to sysreg.h, Wei Huang, 2016/12/06
- [Qemu-devel] [kvm-unit-tests PATCH v14 5/5] arm: pmu: Add CPI checking, Wei Huang, 2016/12/06
- Re: [Qemu-devel] [kvm-unit-tests PATCH v14 0/5] ARM PMU tests, Andrew Jones, 2016/12/07