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Re: [Qemu-devel] [kvm-unit-tests PATCH v13 2/4] arm: Add PMU test
From: |
Andre Przywara |
Subject: |
Re: [Qemu-devel] [kvm-unit-tests PATCH v13 2/4] arm: Add PMU test |
Date: |
Thu, 1 Dec 2016 12:19:21 +0000 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.4.0 |
Hi,
On 01/12/16 12:02, Peter Maydell wrote:
> On 1 December 2016 at 11:28, Andre Przywara <address@hidden> wrote:
>> I don't think so. At least here as a _variable_ type uint32_t is
>> probably the right one, as the ARMv8 ARM explicitly says that PMCR is a
>> 32-bit register, for both bitnesses.
>
> For 64-bit ARM this is strictly speaking just shorthand for "64-bit
> register with the top 32-bit being RES0". It is in theory possible that
> a future architecture extension might define uses for those RES0
> bits.
I trade: "in theory possible that a future architecture extension might"
(that's four speculative terms, right?) against:
ARMv8 ARM, D7.4.7 PMCR_EL0, Performance Monitors Control Register:
Attributes
PMCR_EL0 is a 32-bit register.
If this ever gets extended, we would need extra code to deal with the
new bits, so we would need to touch the code anyway. And again, it's
just a local variable, not an interface.
Cheers,
Andre.
P.S. We really should save this discussion for a Friday afternoon ;-)
- Re: [Qemu-devel] [kvm-unit-tests PATCH v13 1/4] arm: Define macros for accessing system registers, (continued)
[Qemu-devel] [kvm-unit-tests PATCH v13 2/4] arm: Add PMU test, Wei Huang, 2016/12/01
[Qemu-devel] [kvm-unit-tests PATCH v13 3/4] arm: pmu: Check cycle count increases, Wei Huang, 2016/12/01
Re: [Qemu-devel] [kvm-unit-tests PATCH v13 3/4] arm: pmu: Check cycle count increases, Andre Przywara, 2016/12/01
[Qemu-devel] [kvm-unit-tests PATCH v13 4/4] arm: pmu: Add CPI checking, Wei Huang, 2016/12/01