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Re: [Qemu-devel] [PATCH 18/25] tcg/aarch64: Handle ctz and clz opcodes
From: |
Alex Bennée |
Subject: |
Re: [Qemu-devel] [PATCH 18/25] tcg/aarch64: Handle ctz and clz opcodes |
Date: |
Tue, 22 Nov 2016 10:41:21 +0000 |
User-agent: |
mu4e 0.9.17; emacs 25.1.50.20 |
Richard Henderson <address@hidden> writes:
> On 11/16/2016 08:25 PM, Richard Henderson wrote:
>> @@ -206,6 +206,9 @@ static int tcg_target_const_match(tcg_target_long val,
>> TCGType type,
>> if ((ct & TCG_CT_CONST_MONE) && val == -1) {
>> return 1;
>> }
>> + if ((ct & TCG_CT_CONST_WSZ) && val == (type ? 64 : 32)) {
>> + return 1;
>> + }
>>
>> return 0;
>> }
>
> Bah. Forgot to revert this hunk at the last minute.
>
>
> r~
I'm also seeing asserts fire as it decodes risu tests:
IN:
0x0000004000801148: b37ad6fc bfi x28, x23, #6, #54
0x000000400080114c: 00005af0 unallocated (Unallocated)
qemu-aarch64: /home/alex/qemu.git/tcg/tcg-op.c:1937: tcg_gen_deposit_i64:
Assertion `ofs + len <= 64' failed.
Thread 1 "qemu-aarch64" received signal SIGABRT, Aborted.
__GI_raise (address@hidden) at ../sysdeps/unix/sysv/linux/raise.c:58
58 ../sysdeps/unix/sysv/linux/raise.c: No such file or directory.
(gdb) bt
#0 __GI_raise (address@hidden) at ../sysdeps/unix/sysv/linux/raise.c:58
#1 0x0000007fb7ac5df4 in __GI_abort () at abort.c:89
#2 0x0000007fb7abe22c in __assert_fail_base (fmt=0x7fb7bad9f0 "%s%s%s:%u:
%s%sAssertion `%s' failed.\n%n", address@hidden "ofs + len <= 64",
address@hidden "/home/alex/qemu.git/tcg/tcg-op.c", address@hidden,
address@hidden <__PRETTY_FUNCTION__.46784> "tcg_gen_deposit_i64") at assert.c:92
#3 0x0000007fb7abe2c4 in __GI___assert_fail (assertion=0x5555747068 "ofs + len
<= 64", file=0x5555746ec8 "/home/alex/qemu.git/tcg/tcg-op.c", line=1937,
function=0x55557472f0 <__PRETTY_FUNCTION__.46784> "tcg_gen_deposit_i64") at
assert.c:101
#4 0x00000055555ce1e4 in tcg_gen_deposit_i64 (ret=0x1f, arg1=0x1f, arg2=0x3c,
ofs=23, len=48) at /home/alex/qemu.git/tcg/tcg-op.c:1937
#5 0x0000005555694a7c in disas_bitfield (s=0x7fffffea08, insn=3010051815) at
/home/alex/qemu.git/target-arm/translate-a64.c:3249
#6 0x0000005555694dec in disas_data_proc_imm (s=0x7fffffea08, insn=3010051815)
at /home/alex/qemu.git/target-arm/translate-a64.c:3341
#7 0x00000055556a5d30 in disas_a64_insn (env=0x555783ca18, s=0x7fffffea08) at
/home/alex/qemu.git/target-arm/translate-a64.c:11154
#8 0x00000055556a624c in gen_intermediate_code_a64 (cpu=0x5557834720,
tb=0x7fb5822e50) at /home/alex/qemu.git/target-arm/translate-a64.c:11312
#9 0x0000005555651be0 in gen_intermediate_code (env=0x555783ca18,
tb=0x7fb5822e50) at /home/alex/qemu.git/target-arm/translate.c:11588
#10 0x00000055555b8324 in tb_gen_code (cpu=0x5557834720, pc=274886299984,
cs_base=0, flags=2147483648, cflags=0) at
/home/alex/qemu.git/translate-all.c:1311
#11 0x00000055555bafe8 in tb_find (cpu=0x5557834720, last_tb=0x0, tb_exit=0) at
/home/alex/qemu.git/cpu-exec.c:346
#12 0x00000055555bb72c in cpu_exec (cpu=0x5557834720) at
/home/alex/qemu.git/cpu-exec.c:637
#13 0x00000055555f1410 in cpu_loop (env=0x555783ca18) at
/home/alex/qemu.git/linux-user/main.c:788
#14 0x00000055555f2f74 in main (argc=7, argv=0x7ffffff6b8, envp=0x7ffffff6f8)
at /home/alex/qemu.git/linux-user/main.c:4557
(gdb)
Annoyingly in_asm only dumps after a decode but I believe the
instruction is:
0xb369bee7
14c: 00005af0 .inst 0x00005af0 ; undefined
150: b369bee7 bfxil x7, x23, #41, #7
154: 00005af0 .inst 0x00005af0 ; undefined
--
Alex Bennée
- [Qemu-devel] [PATCH 09/25] target-tilegx: Use clz and ctz opcodes, (continued)
- [Qemu-devel] [PATCH 09/25] target-tilegx: Use clz and ctz opcodes, Richard Henderson, 2016/11/16
- [Qemu-devel] [PATCH 08/25] target-s390x: Use clz opcode, Richard Henderson, 2016/11/16
- [Qemu-devel] [PATCH 11/25] target-unicore32: Use clz opcode, Richard Henderson, 2016/11/16
- [Qemu-devel] [PATCH 12/25] target-xtensa: Use clz opcode, Richard Henderson, 2016/11/16
- [Qemu-devel] [PATCH 13/25] target-arm: Use clz opcode, Richard Henderson, 2016/11/16
- [Qemu-devel] [PATCH 14/25] target-i386: Use clz and ctz opcodes, Richard Henderson, 2016/11/16
- [Qemu-devel] [PATCH 15/25] disas/i386.c: Handle tzcnt, Richard Henderson, 2016/11/16
- [Qemu-devel] [PATCH 17/25] tcg/ppc: Handle ctz and clz opcodes, Richard Henderson, 2016/11/16
- [Qemu-devel] [PATCH 18/25] tcg/aarch64: Handle ctz and clz opcodes, Richard Henderson, 2016/11/16
- [Qemu-devel] [PATCH 16/25] tcg/i386: Handle ctz and clz opcodes, Richard Henderson, 2016/11/16
- Re: [Qemu-devel] [PATCH 16/25] tcg/i386: Handle ctz and clz opcodes, Bastian Koppelmann, 2016/11/17
- Re: [Qemu-devel] [PATCH 16/25] tcg/i386: Handle ctz and clz opcodes, Richard Henderson, 2016/11/17
- Re: [Qemu-devel] [PATCH 16/25] tcg/i386: Handle ctz and clz opcodes, Richard Henderson, 2016/11/17
- Re: [Qemu-devel] [PATCH 16/25] tcg/i386: Handle ctz and clz opcodes, Bastian Koppelmann, 2016/11/17
- Re: [Qemu-devel] [PATCH 16/25] tcg/i386: Handle ctz and clz opcodes, Richard Henderson, 2016/11/17
- Re: [Qemu-devel] [PATCH 16/25] tcg/i386: Handle ctz and clz opcodes, Bastian Koppelmann, 2016/11/18
- Re: [Qemu-devel] [PATCH 16/25] tcg/i386: Handle ctz and clz opcodes, Richard Henderson, 2016/11/21
[Qemu-devel] [PATCH 19/25] tcg/arm: Handle ctz and clz opcodes, Richard Henderson, 2016/11/16
[Qemu-devel] [PATCH 20/25] tcg/mips: Handle clz opcode, Richard Henderson, 2016/11/16