Re: [Qemu-devel] [PATCH] target-mips: Implement Loongson 3A processor.

[no-reply]

Hi,

Your series seems to have some coding style problems. See output below for
more information:

Subject: [Qemu-devel] [PATCH] target-mips: Implement Loongson 3A processor.
Type: series
Message-id: address@hidden

=== TEST SCRIPT BEGIN ===
#!/bin/bash

BASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0

# Useful git options
git config --local diff.renamelimit 0
git config --local diff.renames True

commits="$(git log --format=%H --reverse $BASE..)"
for c in $commits; do
    echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..."
    if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
        failed=1
        echo
    fi
    n=$((n+1))
done

exit $failed
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 * [new tag]         patchew/address@hidden -> patchew/address@hidden
Switched to a new branch 'test'
16e778e target-mips: Implement Loongson 3A processor.

=== OUTPUT BEGIN ===
Checking PATCH 1/1: target-mips: Implement Loongson 3A processor....
ERROR: code indent should never use tabs
#17: FILE: target-mips/mips-defs.h:53:
+#define^I^IINSN_LOONGSON3A  0x10000000$

ERROR: code indent should never use tabs
#25: FILE: target-mips/mips-defs.h:74:
+#define^I^ICPU_LOONGSON3A  (CPU_MIPS64R2 | INSN_LOONGSON3A)$

ERROR: braces {} are necessary for all arms of this statement
#49: FILE: target-mips/translate.c:2453:
+    if (left)
[...]

ERROR: braces {} are necessary for all arms of this statement
#65: FILE: target-mips/translate.c:2469:
+    if (left)
[...]
+    else
[...]

ERROR: braces {} are necessary for all arms of this statement
#88: FILE: target-mips/translate.c:2492:
+    if (left)
[...]

ERROR: switch and case should be at the same indent
#128: FILE: target-mips/translate.c:2532:
+            switch (ctx->opcode & 0xc03f) {
+                case 4:      /* gslwlc1 */
[...]
+                case 5:      /* gslwrc1 */
[...]
+                case 6:      /* gsldlc1 */
[...]
+                case 7:      /* gsldrc1 */
[...]
+                default:

ERROR: space prohibited before that '++' (ctx:WxO)
#146: FILE: target-mips/translate.c:2550:
+                    gen_excp_cop2 ++;
                                   ^

ERROR: switch and case should be at the same indent
#149: FILE: target-mips/translate.c:2553:
+            switch (ctx->opcode & 0x8020) {
[...]
+                case 0x20:   /* gslq */
[...]
+                case 0x8020: /* gslqc1 */
[...]
+                default:

ERROR: space prohibited before that '++' (ctx:WxO)
#176: FILE: target-mips/translate.c:2580:
+                    gen_excp_cop2 ++;
                                   ^

ERROR: switch and case should be at the same indent
#181: FILE: target-mips/translate.c:2585:
+            switch (ctx->opcode & 0x7) {
+                case 0x0:    /* gslbx */
[...]
+                case 0x1:    /* gslhx */
[...]
+                case 0x2:    /* gslwx */
[...]
+                case 0x3:    /* gsldx */
[...]
+                case 0x6:    /* gslwxc1 */
[...]
+                case 0x7:    /* gsldxc1 */
[...]
+                default:

ERROR: switch and case should be at the same indent
#249: FILE: target-mips/translate.c:2653:
+            switch (ctx->opcode & 0xc03f) {
+                case 4:      /* gsswlc1 */
[...]
+                case 5:      /* gsswrc1 */
[...]
+                case 6:      /* gssdlc1 */

ERROR: space prohibited before that '++' (ctx:WxO)
#309: FILE: target-mips/translate.c:2713:
+                    gen_excp_cop2 ++;
                                   ^

ERROR: switch and case should be at the same indent
#312: FILE: target-mips/translate.c:2716:
+            switch (ctx->opcode & 0x8020) {
[...]
+                case 0x20:   /* gssq */
[...]
+                case 0x8020: /* gssqc1 */
[...]
+                default:

ERROR: space prohibited before that '++' (ctx:WxO)
#341: FILE: target-mips/translate.c:2745:
+                    gen_excp_cop2 ++;
                                   ^

ERROR: switch and case should be at the same indent
#346: FILE: target-mips/translate.c:2750:
+            switch (ctx->opcode & 0x7) {
+                case 0x0:    /* gssbx */
[...]
+                case 0x1:    /* gsshx */
[...]
+                case 0x2:    /* gsswx */
[...]
+                case 0x3:    /* gssdx */
[...]
+                case 0x6:    /* gsswxc1 */
[...]
+                case 0x7:    /* gssdxc1 */
[...]
+                default:

ERROR: space prohibited after that open parenthesis '('
#538: FILE: target-mips/translate_init.c:784:
+        .CP0_Config2 = MIPS_CONFIG2 | (5 << CP0C2_SS) | ( 5 << CP0C2_SL) |

total: 16 errors, 0 warnings, 527 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

=== OUTPUT END ===

Test command exited with code: 1


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