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Re: [Qemu-devel] [PATCH 10/25] target-tricore: Use clz opcode
From: |
Bastian Koppelmann |
Subject: |
Re: [Qemu-devel] [PATCH 10/25] target-tricore: Use clz opcode |
Date: |
Thu, 17 Nov 2016 16:47:59 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.4.0 |
On 11/17/2016 03:42 PM, Bastian Koppelmann wrote:
> On 11/16/2016 08:25 PM, Richard Henderson wrote:
>> diff --git a/target-tricore/translate.c b/target-tricore/translate.c
>> index 36f734a..69cdfb9 100644
>> --- a/target-tricore/translate.c
>> +++ b/target-tricore/translate.c
>> @@ -6367,7 +6367,8 @@ static void decode_rr_logical_shift(CPUTriCoreState
>> *env, DisasContext *ctx)
>> tcg_gen_andc_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);
>> break;
>> case OPC2_32_RR_CLO:
>> - gen_helper_clo(cpu_gpr_d[r3], cpu_gpr_d[r1]);
>> + tcg_gen_not_tl(cpu_gpr_d[r3], cpu_gpr_d[r1]);
>> + tcg_gen_clzi_tl(cpu_gpr_d[r3], cpu_gpr_d[r3], TARGET_LONG_BITS);
>
> This doesn't work for r1 = 0. It returns 0x1f, but should return 0. I
> guess the error is not here, but I couldn't figure out where exactly it is.
Ah I forgot to mention -- I'm running this on x86_64.
Cheers,
Bastian
- [Qemu-devel] [PATCH 02/25] target-alpha: Use the ctz and clz opcodes, (continued)
- [Qemu-devel] [PATCH 02/25] target-alpha: Use the ctz and clz opcodes, Richard Henderson, 2016/11/16
- [Qemu-devel] [PATCH 03/25] target-cris: Use clz opcode, Richard Henderson, 2016/11/16
- [Qemu-devel] [PATCH 04/25] target-microblaze: Use clz opcode, Richard Henderson, 2016/11/16
- [Qemu-devel] [PATCH 01/25] tcg: Add clz and ctz opcodes, Richard Henderson, 2016/11/16
- [Qemu-devel] [PATCH 05/25] target-mips: Use clz opcode, Richard Henderson, 2016/11/16
- [Qemu-devel] [PATCH 06/25] target-openrisc: Use clz and ctz opcodes, Richard Henderson, 2016/11/16
- [Qemu-devel] [PATCH 07/25] target-ppc: Use clz and ctz opcodes, Richard Henderson, 2016/11/16
- [Qemu-devel] [PATCH 10/25] target-tricore: Use clz opcode, Richard Henderson, 2016/11/16
- [Qemu-devel] [PATCH 09/25] target-tilegx: Use clz and ctz opcodes, Richard Henderson, 2016/11/16
- [Qemu-devel] [PATCH 08/25] target-s390x: Use clz opcode, Richard Henderson, 2016/11/16
- [Qemu-devel] [PATCH 11/25] target-unicore32: Use clz opcode, Richard Henderson, 2016/11/16
- [Qemu-devel] [PATCH 12/25] target-xtensa: Use clz opcode, Richard Henderson, 2016/11/16
- [Qemu-devel] [PATCH 13/25] target-arm: Use clz opcode, Richard Henderson, 2016/11/16
- [Qemu-devel] [PATCH 14/25] target-i386: Use clz and ctz opcodes, Richard Henderson, 2016/11/16
- [Qemu-devel] [PATCH 15/25] disas/i386.c: Handle tzcnt, Richard Henderson, 2016/11/16
- [Qemu-devel] [PATCH 17/25] tcg/ppc: Handle ctz and clz opcodes, Richard Henderson, 2016/11/16
- [Qemu-devel] [PATCH 18/25] tcg/aarch64: Handle ctz and clz opcodes, Richard Henderson, 2016/11/16