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[Qemu-devel] [Bug 1631625] [NEW] target-mips/dsp_helper.c: two possible
From: |
dcb |
Subject: |
[Qemu-devel] [Bug 1631625] [NEW] target-mips/dsp_helper.c: two possible bad shifts |
Date: |
Sat, 08 Oct 2016 16:19:31 -0000 |
Public bug reported:
target-mips/dsp_helper.c:3480:1: error: V629 Consider inspecting the
'0x01 << (size + 1)' expression. Bit shifting of the 32-bit value with a
subsequent expansion to the 64-bit type.
Source code is
temp = temp & ((0x01 << (size + 1)) - 1);
If size >= 32, then better code might be
temp = temp & ((0x01UL << (size + 1)) - 1);
target-mips/dsp_helper.c:3509:1: error: V629 Consider inspecting the
'0x01 << (size + 1)' expression. Bit shifting of the 32-bit value with a
subsequent expansion to the 64-bit type.
Duplicate
** Affects: qemu
Importance: Undecided
Status: New
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https://bugs.launchpad.net/bugs/1631625
Title:
target-mips/dsp_helper.c: two possible bad shifts
Status in QEMU:
New
Bug description:
target-mips/dsp_helper.c:3480:1: error: V629 Consider inspecting the
'0x01 << (size + 1)' expression. Bit shifting of the 32-bit value with
a subsequent expansion to the 64-bit type.
Source code is
temp = temp & ((0x01 << (size + 1)) - 1);
If size >= 32, then better code might be
temp = temp & ((0x01UL << (size + 1)) - 1);
target-mips/dsp_helper.c:3509:1: error: V629 Consider inspecting the
'0x01 << (size + 1)' expression. Bit shifting of the 32-bit value with
a subsequent expansion to the 64-bit type.
Duplicate
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