Re: [Qemu-devel] [PATCH] qtest: add read/write accessors with a specific endianness

[David Gibson]

On Wed, Oct 05, 2016 at 07:20:52AM -0700, Peter Maydell wrote:
> On 5 October 2016 at 07:00, Cédric Le Goater <address@hidden> wrote:
> > On 10/05/2016 03:53 PM, Peter Maydell wrote:
> >> Which tswap? Last time I worked through the stack of
> >> what happens I thought that we had the right set of
> >> swaps in the right places.
> >
> > The one I am talking about are under qtest_process_command(),
> > see below.
> 
> Those are correct and required, and they do not change
> the overall behaviour of the system depending on the host
> endianness. (They convert 32-bit values to "bag of
> bytes in guest order" which is what the cpu_physical_memory_*
> functions want.)

These functions are correct for the defined semantics of the
readw/readl operations, but those semantics are not useful.

This proposal is introducing alternate functions with the more useful
semantics which are "convert a 32-bit value to a bag of bytes in LE
order" or "convert a 32-bit value to a bag of bytes in BE order"
depending on which variant you choose.

qtest is about testing hardware, not the guest cpu, and whether you're
accessing MMIO space or buffers the hardware will read via DMA, it's
the hardware which determines the correct endianness, not the guest
cpu.

> https://lists.gnu.org/archive/html/qemu-arm/2016-07/msg00037.html
> is the explanation from last time around, I think.
> 
> If your test is giving different answers on different
> host endiannesses, it is presumably because it is
> incorrectly issuing different readl/etc commands
> in the two cases.
> 
> thanks
> -- PMM
> 

-- 
David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!
http://www.ozlabs.org/~dgibson

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