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[Qemu-devel] [PULL 26/27] target-arm: A64: Fix decoding of iss_sf in dis
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 26/27] target-arm: A64: Fix decoding of iss_sf in disas_ld_lit |
Date: |
Tue, 4 Oct 2016 13:42:54 +0100 |
From: "Edgar E. Iglesias" <address@hidden>
Fix the decoding of iss_sf in disas_ld_lit.
The SF (Sixty-Four) field in the ISS (Instruction Specific Syndrome)
is a bit that specifies the width of the register that the
instruction loads to.
If cleared it specifies 32 bits.
If set it specifies 64 bits.
Signed-off-by: Edgar E. Iglesias <address@hidden>
Message-id: address@hidden
[PMM: tweaked phrasing per on-list discussion]
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
target-arm/translate-a64.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index ddf52f5..307e281 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -2025,7 +2025,7 @@ static void disas_ld_lit(DisasContext *s, uint32_t insn)
do_fp_ld(s, rt, tcg_addr, size);
} else {
/* Only unsigned 32bit loads target 32bit registers. */
- bool iss_sf = opc == 0 ? 32 : 64;
+ bool iss_sf = opc != 0;
do_gpr_ld(s, tcg_rt, tcg_addr, size, is_signed, false,
true, rt, iss_sf, false);
--
2.7.4
- [Qemu-devel] [PULL 00/27] target-arm queue, Peter Maydell, 2016/10/04
- [Qemu-devel] [PULL 15/27] hw/intc/arm_gic(v3)_kvm: Initialize gsi routing, Peter Maydell, 2016/10/04
- [Qemu-devel] [PULL 14/27] hw/arm/virt: add 2.8 machine type, Peter Maydell, 2016/10/04
- [Qemu-devel] [PULL 18/27] kvm-all: Pass requester ID to MSI routing functions, Peter Maydell, 2016/10/04
- [Qemu-devel] [PULL 13/27] vmstateify tsc210x, Peter Maydell, 2016/10/04
- [Qemu-devel] [PULL 17/27] target-arm: move gicv3_class_name from machine to kvm_arm.h, Peter Maydell, 2016/10/04
- [Qemu-devel] [PULL 20/27] arm/virt: Add ITS to the virt board, Peter Maydell, 2016/10/04
- [Qemu-devel] [PULL 16/27] hw/intc/arm_gicv3_its: Implement ITS base class, Peter Maydell, 2016/10/04
- [Qemu-devel] [PULL 09/27] mainstone: Fix incorrect key mapping for Enter key., Peter Maydell, 2016/10/04
- [Qemu-devel] [PULL 08/27] MAINTAINERS: Add Alistair to the maintainers list, Peter Maydell, 2016/10/04
- [Qemu-devel] [PULL 26/27] target-arm: A64: Fix decoding of iss_sf in disas_ld_lit,
Peter Maydell <=
- [Qemu-devel] [PULL 24/27] docs: Add a generic loader explanation document, Peter Maydell, 2016/10/04
- [Qemu-devel] [PULL 03/27] STM32F2xx: Add the ADC device, Peter Maydell, 2016/10/04
- [Qemu-devel] [PULL 02/27] STM32F2xx: Display PWM duty cycle from timer, Peter Maydell, 2016/10/04
- [Qemu-devel] [PULL 19/27] hw/intc/arm_gicv3_its: Implement support for in-kernel ITS emulation, Peter Maydell, 2016/10/04
- [Qemu-devel] [PULL 07/27] STM32F205: Connect the SPI devices, Peter Maydell, 2016/10/04
- [Qemu-devel] [PULL 06/27] STM32F205: Connect the ADC devices, Peter Maydell, 2016/10/04
- [Qemu-devel] [PULL 27/27] target-arm: Correctly handle 'sub pc, pc, 1' for ARMv6, Peter Maydell, 2016/10/04
- [Qemu-devel] [PULL 10/27] mainstone: Add mapping for dot, slash and backspace., Peter Maydell, 2016/10/04