[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 02/20] target-i386: Add a marker to end of the region
From: |
Eduardo Habkost |
Subject: |
[Qemu-devel] [PULL 02/20] target-i386: Add a marker to end of the region zeroed on reset |
Date: |
Tue, 27 Sep 2016 17:12:12 -0300 |
Instead of using cpuid_level, use an empty struct as a marker
(like we already did with {start,end}_init_save). This will avoid
accidentaly resetting the wrong fields if we change the field
ordering on CPUX86State.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>
---
target-i386/cpu.c | 2 +-
target-i386/cpu.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 920b78f..26f0e59 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -2714,7 +2714,7 @@ static void x86_cpu_reset(CPUState *s)
xcc->parent_reset(s);
- memset(env, 0, offsetof(CPUX86State, cpuid_level));
+ memset(env, 0, offsetof(CPUX86State, end_reset_fields));
tlb_flush(s, 1);
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 27af9c3..604d591 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -1108,6 +1108,7 @@ typedef struct CPUX86State {
CPU_COMMON
/* Fields from here on are preserved across CPU reset. */
+ struct {} end_reset_fields;
/* processor features (e.g. for CPUID insn) */
uint32_t cpuid_level;
--
2.7.4
- [Qemu-devel] [PULL 00/20] x86 and machine queue, 2016-09-27, Eduardo Habkost, 2016/09/27
- [Qemu-devel] [PULL 02/20] target-i386: Add a marker to end of the region zeroed on reset,
Eduardo Habkost <=
- [Qemu-devel] [PULL 01/20] target-i386: Remove unused X86CPUDefinition::xlevel2 field, Eduardo Habkost, 2016/09/27
- [Qemu-devel] [PULL 05/20] target-i386: Automatically set level/xlevel/xlevel2 when needed, Eduardo Habkost, 2016/09/27
- [Qemu-devel] [PULL 03/20] tests: Add test code for CPUID level/xlevel handling, Eduardo Habkost, 2016/09/27
- [Qemu-devel] [PULL 04/20] tests: Test CPUID level handling for old machines, Eduardo Habkost, 2016/09/27
- [Qemu-devel] [PULL 06/20] target-i386: Enable CPUID[0x8000000A] if SVM is enabled, Eduardo Habkost, 2016/09/27
- [Qemu-devel] [PULL 07/20] linux-user: remove #define smp_{cores, threads}, Eduardo Habkost, 2016/09/27
- [Qemu-devel] [PULL 11/20] target-i386: xsave: Simplify CPUID[0xD, 0].{EAX, EDX} calculation, Eduardo Habkost, 2016/09/27
- [Qemu-devel] [PULL 08/20] target-i386: Move feature name arrays inside FeatureWordInfo, Eduardo Habkost, 2016/09/27
- [Qemu-devel] [PULL 10/20] target-i386: xsave: Calculate enabled components only once, Eduardo Habkost, 2016/09/27
- [Qemu-devel] [PULL 09/20] target-i386: Don't try to enable PT State xsave component, Eduardo Habkost, 2016/09/27