Re: [Qemu-devel] [PATCH 2/2] target-mips: reimplement SC instruction and use cmpxchg

[Richard Henderson]

On 09/21/2016 01:07 AM, Leon Alrae wrote:
> +    tcg_gen_brcond_tl(TCG_COND_EQ, addr, cpu_lladdr, l1);
> +    tcg_temp_free(addr);
> +    tcg_gen_movi_tl(t0, 0);
> +    tcg_gen_br(done);
> +
> +    gen_set_label(l1);
> +    /* generate cmpxchg */
> +    val = tcg_temp_new();
> +    gen_load_gpr(val, rt);
> +    tcg_gen_atomic_cmpxchg_tl(t0, cpu_lladdr, cpu_llval, val,
> +                              ctx->mem_idx, tcg_mo);
> +    tcg_gen_setcond_tl(TCG_COND_EQ, t0, t0, cpu_llval);
> +    tcg_temp_free(val);
> +
> +    gen_set_label(done);
> +    /* store the result into the register */
> +    gen_store_gpr(t0, rt);
>      tcg_temp_free(t0);

The only thing I would change is to duplicate the gen_store_gpr into both 
branches, so that we don't have to store t0 into the stack across the blocks.

Otherwise,

Reviewed-by: Richard Henderson <address@hidden>


r~