[Qemu-devel] [PATCH v2 3/5] exec: [tcg] Switch physical TB cache based on vCPU tracing state

[Lluís Vilanova]

Uses the per-vCPU event state in CPUState->trace_dstate (a bitmap) as an
index to a physical TB cache that will contain code specific to the set
of dynamically enabled events.

Two vCPUs tracing different events will execute code from different
physical TB caches. Two vCPUs tracing the same events will execute code
from the same physical TB cache.

This is used on the next patch to optimize TCG code related to event
tracing.

Signed-off-by: Lluís Vilanova <address@hidden>
---
 cpu-exec.c             |    6 ++++++
 trace/control-target.c |    2 ++
 trace/control.h        |    3 +++
 translate-all.c        |   23 +++++++++++++++++++++++
 translate-all.h        |   26 ++++++++++++++++++++++++++
 5 files changed, 60 insertions(+)

diff --git a/cpu-exec.c b/cpu-exec.c
index 7b2d8c6..14fc44c 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -29,6 +29,7 @@
 #include "qemu/rcu.h"
 #include "exec/tb-hash.h"
 #include "exec/log.h"
+#include "translate-all.h"
 #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
 #include "hw/i386/apic.h"
 #endif
@@ -512,6 +513,11 @@ static inline void cpu_handle_interrupt(CPUState *cpu,
             *last_tb = NULL;
         }
     }
+    if (unlikely(cpu_tb_cache_set_requested(cpu))) {
+        cpu_tb_cache_set_apply(cpu);
+        /* avoid chaning TBs across physical TB caches */
+        *last_tb = NULL;
+    }
     if (unlikely(cpu->exit_request || replay_has_interrupt())) {
         cpu->exit_request = 0;
         cpu->exception_index = EXCP_INTERRUPT;
diff --git a/trace/control-target.c b/trace/control-target.c
index 72081e2..2d854a7 100644
--- a/trace/control-target.c
+++ b/trace/control-target.c
@@ -79,5 +79,7 @@ void trace_event_set_vcpu_state_dynamic(CPUState *vcpu,
             clear_bit(vcpu_id, vcpu->trace_dstate);
             trace_events_dstate[id]--;
         }
+        /* TODO: do not wait until the current TB finishes */
+        cpu_tb_cache_set_request(vcpu);
     }
 }
diff --git a/trace/control.h b/trace/control.h
index 27a16fc..ca88682 100644
--- a/trace/control.h
+++ b/trace/control.h
@@ -210,6 +210,9 @@ void trace_event_set_state_dynamic(TraceEvent *ev, bool 
state);
  * Set the dynamic tracing state of an event for the given vCPU.
  *
  * Pre-condition: trace_event_get_vcpu_state_static(ev) == true
+ *
+ * Note: Changes for execution-time events with the 'tcg' property will not be
+ *       propagated until the next TB is executed (iff executing in TCG mode).
  */
 void trace_event_set_vcpu_state_dynamic(CPUState *vcpu,
                                         TraceEvent *ev, bool state);
diff --git a/translate-all.c b/translate-all.c
index c864eee..56e7142 100644
--- a/translate-all.c
+++ b/translate-all.c
@@ -1166,6 +1166,29 @@ static void tb_link_page(TranslationBlock *tb, 
tb_page_addr_t phys_pc,
 #endif
 }
 
+void cpu_tb_cache_set_request(CPUState *cpu)
+{
+    /*
+     * Request is taken from cpu->trace_dstate and lazily applied into
+     * cpu->tb_cache_idx at cpu_tb_cache_set_apply().
+     */
+    /* NOTE: Checked by all TBs in gen_tb_start(). */
+    cpu->tcg_exit_req = true;
+}
+
+bool cpu_tb_cache_set_requested(CPUState *cpu)
+{
+    return !bitmap_equal(cpu->tb_cache_idx, cpu->trace_dstate,
+                         TRACE_VCPU_EVENT_COUNT);
+}
+
+void cpu_tb_cache_set_apply(CPUState *cpu)
+{
+    bitmap_copy(cpu->tb_cache_idx, cpu->trace_dstate,
+                TRACE_VCPU_EVENT_COUNT);
+    tb_flush_jmp_cache_all(cpu);
+}
+
 /* Called with mmap_lock held for user mode emulation.  */
 TranslationBlock *tb_gen_code(CPUState *cpu,
                               target_ulong pc, target_ulong cs_base,
diff --git a/translate-all.h b/translate-all.h
index d39bf32..fcc7fb0 100644
--- a/translate-all.h
+++ b/translate-all.h
@@ -36,6 +36,32 @@ static size_t tb_caches_count(void);
  */
 static struct qht *tb_caches_get(TBContext *tb_ctx, unsigned long *bitmap);
 
+/**
+ * cpu_tb_cache_set_request:
+ *
+ * Request a physical TB cache switch on this @cpu.
+ */
+void cpu_tb_cache_set_request(CPUState *cpu);
+
+/**
+ * cpu_tb_cache_set_requested:
+ *
+ * Returns: %true if @cpu requested a physical TB cache switch, %false
+ *          otherwise.
+ */
+bool cpu_tb_cache_set_requested(CPUState *cpu);
+
+/**
+ * cput_tb_cache_set_apply:
+ *
+ * Apply a physical TB cache switch.
+ *
+ * Precondition: @cpu is not currently executing any TB.
+ *
+ * Note: Invalidates the jump cache of the given vCPU.
+ */
+void cpu_tb_cache_set_apply(CPUState *cpu);
+
 /* translate-all.c */
 void tb_invalidate_phys_page_fast(tb_page_addr_t start, int len);
 void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end,