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[Qemu-devel] [RFC v4 09/28] tcg: protect TBContext with tb_lock.
From: |
Alex Bennée |
Subject: |
[Qemu-devel] [RFC v4 09/28] tcg: protect TBContext with tb_lock. |
Date: |
Thu, 11 Aug 2016 16:24:05 +0100 |
From: KONRAD Frederic <address@hidden>
This protects TBContext with tb_lock to make tb_* thread safe.
<more detail here>
Signed-off-by: KONRAD Frederic <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Emilio G. Cota <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>
[AJB: moved into tree, clean-up history]
Signed-off-by: Alex Bennée <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
---
v4 (base-patches, ajb):
- protect tb_phys_invalidate with tb_lock
- drop mention of tb_flush, thread safe flushing in earlier patch series
v3 (base-patches, ajb):
- more explicit comments on resetting tb_lock
- more explicit comments about thread safety of user-mode tb_flush
v2 (base-patches, ajb):
- re-base fixes
v7 (FK, MTTCG):
- Drop a tb_lock in already locked restore_state_to_opc.
v6 (FK, MTTCG):
- Drop a tb_lock arround tb_find_fast in cpu-exec.c.
---
cpu-exec.c | 6 ++++++
exec.c | 6 ++++++
hw/i386/kvmvapic.c | 4 ++++
translate-all.c | 28 ++++++++++++++++++++++++----
4 files changed, 40 insertions(+), 4 deletions(-)
diff --git a/cpu-exec.c b/cpu-exec.c
index f8fbf0d..93a0eb1 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -210,15 +210,21 @@ static void cpu_exec_nocache(CPUState *cpu, int
max_cycles,
if (max_cycles > CF_COUNT_MASK)
max_cycles = CF_COUNT_MASK;
+ tb_lock();
tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base, orig_tb->flags,
max_cycles | CF_NOCACHE
| (ignore_icount ? CF_IGNORE_ICOUNT : 0));
tb->orig_tb = orig_tb;
+ tb_unlock();
+
/* execute the generated code */
trace_exec_tb_nocache(tb, tb->pc);
cpu_tb_exec(cpu, tb);
+
+ tb_lock();
tb_phys_invalidate(tb, -1);
tb_free(tb);
+ tb_unlock();
}
#endif
diff --git a/exec.c b/exec.c
index 60cf46a..f2ea554 100644
--- a/exec.c
+++ b/exec.c
@@ -2085,6 +2085,12 @@ static void check_watchpoint(int offset, int len,
MemTxAttrs attrs, int flags)
continue;
}
cpu->watchpoint_hit = wp;
+
+ /* The tb_lock will be reset when cpu_loop_exit or
+ * cpu_loop_exit_noexc longjmp back into the cpu_exec
+ * main loop.
+ */
+ tb_lock();
tb_check_watchpoint(cpu);
if (wp->flags & BP_STOP_BEFORE_ACCESS) {
cpu->exception_index = EXCP_DEBUG;
diff --git a/hw/i386/kvmvapic.c b/hw/i386/kvmvapic.c
index 1bc02fb..0024b76 100644
--- a/hw/i386/kvmvapic.c
+++ b/hw/i386/kvmvapic.c
@@ -17,6 +17,7 @@
#include "sysemu/kvm.h"
#include "hw/i386/apic_internal.h"
#include "hw/sysbus.h"
+#include "tcg/tcg.h"
#define VAPIC_IO_PORT 0x7e
@@ -449,6 +450,9 @@ static void patch_instruction(VAPICROMState *s, X86CPU
*cpu, target_ulong ip)
resume_all_vcpus();
if (!kvm_enabled()) {
+ /* tb_lock will be reset when cpu_loop_exit_noexc longjmps
+ * back into the cpu_exec loop. */
+ tb_lock();
tb_gen_code(cs, current_pc, current_cs_base, current_flags, 1);
cpu_loop_exit_noexc(cs);
}
diff --git a/translate-all.c b/translate-all.c
index 213685c..d21e5ab 100644
--- a/translate-all.c
+++ b/translate-all.c
@@ -347,8 +347,10 @@ bool cpu_restore_state(CPUState *cpu, uintptr_t retaddr)
cpu_restore_state_from_tb(cpu, tb, retaddr);
if (tb->cflags & CF_NOCACHE) {
/* one-shot translation, invalidate it immediately */
+ tb_lock();
tb_phys_invalidate(tb, -1);
tb_free(tb);
+ tb_unlock();
}
return true;
}
@@ -1417,6 +1419,7 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start,
tb_page_addr_t end,
/* we remove all the TBs in the range [start, end[ */
/* XXX: see if in some cases it could be faster to invalidate all
the code */
+ tb_lock();
tb = p->first_tb;
while (tb != NULL) {
n = (uintptr_t)tb & 3;
@@ -1476,6 +1479,7 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start,
tb_page_addr_t end,
cpu_loop_exit_noexc(cpu);
}
#endif
+ tb_unlock();
}
#ifdef CONFIG_SOFTMMU
@@ -1545,6 +1549,8 @@ static bool tb_invalidate_phys_page(tb_page_addr_t addr,
uintptr_t pc)
if (!p) {
return false;
}
+
+ tb_lock();
tb = p->first_tb;
#ifdef TARGET_HAS_PRECISE_SMC
if (tb && pc != 0) {
@@ -1582,9 +1588,13 @@ static bool tb_invalidate_phys_page(tb_page_addr_t addr,
uintptr_t pc)
modifying the memory. It will ensure that it cannot modify
itself */
tb_gen_code(cpu, current_pc, current_cs_base, current_flags, 1);
+ /* tb_lock will be reset after cpu_loop_exit_noexc longjmps
+ * back into the cpu_exec loop. */
return true;
}
#endif
+ tb_unlock();
+
return false;
}
#endif
@@ -1679,6 +1689,7 @@ void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr)
target_ulong pc, cs_base;
uint32_t flags;
+ tb_lock();
tb = tb_find_pc(retaddr);
if (!tb) {
cpu_abort(cpu, "cpu_io_recompile: could not find TB for pc=%p",
@@ -1730,11 +1741,16 @@ void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr)
/* FIXME: In theory this could raise an exception. In practice
we have already translated the block once so it's probably ok. */
tb_gen_code(cpu, pc, cs_base, flags, cflags);
+
/* TODO: If env->pc != tb->pc (i.e. the faulting instruction was not
- the first in the TB) then we end up generating a whole new TB and
- repeating the fault, which is horribly inefficient.
- Better would be to execute just this insn uncached, or generate a
- second new TB. */
+ * the first in the TB) then we end up generating a whole new TB and
+ * repeating the fault, which is horribly inefficient.
+ * Better would be to execute just this insn uncached, or generate a
+ * second new TB.
+ *
+ * cpu_loop_exit_noexc will longjmp back to cpu_exec where the
+ * tb_lock gets reset.
+ */
cpu_loop_exit_noexc(cpu);
}
@@ -1763,6 +1779,8 @@ void dump_exec_info(FILE *f, fprintf_function cpu_fprintf)
size_t hgram_bins;
char *hgram;
+ tb_lock();
+
target_code_size = 0;
max_target_code_size = 0;
cross_page = 0;
@@ -1850,6 +1868,8 @@ void dump_exec_info(FILE *f, fprintf_function cpu_fprintf)
tcg_ctx.tb_ctx.tb_phys_invalidate_count);
cpu_fprintf(f, "TLB flush count %d\n", tlb_flush_count);
tcg_dump_info(f, cpu_fprintf);
+
+ tb_unlock();
}
void dump_opcount_info(FILE *f, fprintf_function cpu_fprintf)
--
2.7.4
- [Qemu-devel] [RFC v4 02/28] translate_all: DEBUG_FLUSH -> DEBUG_TB_FLUSH, (continued)
- [Qemu-devel] [RFC v4 02/28] translate_all: DEBUG_FLUSH -> DEBUG_TB_FLUSH, Alex Bennée, 2016/08/11
- [Qemu-devel] [RFC v4 04/28] cpu-exec: include cpu_index in CPU_LOG_EXEC messages, Alex Bennée, 2016/08/11
- [Qemu-devel] [RFC v4 01/28] cpus: make all_vcpus_paused() return bool, Alex Bennée, 2016/08/11
- [Qemu-devel] [RFC v4 03/28] translate-all: add DEBUG_LOCKING asserts, Alex Bennée, 2016/08/11
- [Qemu-devel] [RFC v4 05/28] docs: new design document multi-thread-tcg.txt (DRAFTING), Alex Bennée, 2016/08/11
- [Qemu-devel] [RFC v4 08/28] translate-all: Add assert_(memory|tb)_lock annotations, Alex Bennée, 2016/08/11
- [Qemu-devel] [RFC v4 10/28] target-arm/arm-powerctl: wake up sleeping CPUs, Alex Bennée, 2016/08/11
- [Qemu-devel] [RFC v4 07/28] linux-user/elfload: ensure mmap_lock() held while setting up, Alex Bennée, 2016/08/11
- [Qemu-devel] [RFC v4 06/28] tcg: comment on which functions have to be called with tb_lock held, Alex Bennée, 2016/08/11
- [Qemu-devel] [RFC v4 15/28] tcg: rename tcg_current_cpu to tcg_current_rr_cpu, Alex Bennée, 2016/08/11
- [Qemu-devel] [RFC v4 09/28] tcg: protect TBContext with tb_lock.,
Alex Bennée <=
- [Qemu-devel] [RFC v4 11/28] tcg: move tcg_exec_all and helpers above thread fn, Alex Bennée, 2016/08/11
- [Qemu-devel] [RFC v4 14/28] tcg: add kick timer for single-threaded vCPU emulation, Alex Bennée, 2016/08/11
- [Qemu-devel] [RFC v4 12/28] tcg: cpus rm tcg_exec_all(), Alex Bennée, 2016/08/11
- [Qemu-devel] [RFC v4 13/28] tcg: add options for enabling MTTCG, Alex Bennée, 2016/08/11
- [Qemu-devel] [RFC v4 17/28] cpus: re-factor out handle_icount_deadline, Alex Bennée, 2016/08/11
- [Qemu-devel] [RFC v4 18/28] tcg: remove global exit_request, Alex Bennée, 2016/08/11
- [Qemu-devel] [RFC v4 19/28] tcg: move locking for tb_invalidate_phys_page_range up, Alex Bennée, 2016/08/11
- [Qemu-devel] [RFC v4 16/28] tcg: drop global lock during TCG code execution, Alex Bennée, 2016/08/11
- [Qemu-devel] [RFC v4 21/28] tcg: enable tb_lock() for SoftMMU, Alex Bennée, 2016/08/11
- [Qemu-devel] [RFC v4 22/28] tcg: enable thread-per-vCPU, Alex Bennée, 2016/08/11