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Re: [Qemu-devel] [PATCH 1/6] target-ppc: add xxspltib instruction
From: |
Nikunj A Dadhania |
Subject: |
Re: [Qemu-devel] [PATCH 1/6] target-ppc: add xxspltib instruction |
Date: |
Mon, 08 Aug 2016 11:49:29 +0530 |
User-agent: |
Notmuch/0.21 (https://notmuchmail.org) Emacs/25.0.94.1 (x86_64-redhat-linux-gnu) |
Richard Henderson <address@hidden> writes:
> On 08/07/2016 11:06 PM, Nikunj A Dadhania wrote:
>> +#define pattern(x) (((x) & 0xff) * (~(target_ulong)0 / 0xff))
>> +
>> +static void gen_xxspltib(DisasContext *ctx)
>> +{
>> + unsigned char uim8 = IMM8(ctx->opcode);
>> + if (xS(ctx->opcode) < 32) {
>> + if (unlikely(!ctx->altivec_enabled)) {
>> + gen_exception(ctx, POWERPC_EXCP_VPU);
>> + return;
>> + }
>> + } else {
>> + if (unlikely(!ctx->vsx_enabled)) {
>> + gen_exception(ctx, POWERPC_EXCP_VSXU);
>> + return;
>> + }
>> + }
>> + tcg_gen_movi_i64(cpu_vsrh(xT(ctx->opcode)), pattern(uim8));
>> + tcg_gen_movi_i64(cpu_vsrl(xT(ctx->opcode)), pattern(uim8));
>> +}
>> +
>
> Is this protected by TARGET_PPC64? Otherwise the combination of movi_i64 and
> target_ulong looks odd.
No it is not, will add that.
Regards
NIkunj
- [Qemu-devel] [PATCH 0/6] POWER9 TCG enablements - part4, Nikunj A Dadhania, 2016/08/07
- [Qemu-devel] [PATCH 1/6] target-ppc: add xxspltib instruction, Nikunj A Dadhania, 2016/08/07
- [Qemu-devel] [PATCH 2/6] target-ppc: Implement darn instruction, Nikunj A Dadhania, 2016/08/07
- Re: [Qemu-devel] [PATCH 2/6] target-ppc: Implement darn instruction, David Gibson, 2016/08/08
- Re: [Qemu-devel] [PATCH 2/6] target-ppc: Implement darn instruction, Nikunj A Dadhania, 2016/08/09
- Re: [Qemu-devel] [Qemu-ppc] [PATCH 2/6] target-ppc: Implement darn instruction, Nikunj A Dadhania, 2016/08/09
- Re: [Qemu-devel] [Qemu-ppc] [PATCH 2/6] target-ppc: Implement darn instruction, David Gibson, 2016/08/12
- Re: [Qemu-devel] [Qemu-ppc] [PATCH 2/6] target-ppc: Implement darn instruction, Nikunj A Dadhania, 2016/08/12