[Qemu-devel] [PATCH V5 0/7] pxb: fix 64-bit MMIO allocation

[Marcel Apfelbaum]

v4 -> v5:
  Addressed the pull request issues: (Peter Maydell)
  See: https://lists.gnu.org/archive/html/qemu-devel/2016-07/msg00882.html
  - cland warning -> "hw/pci/pci.c:196:23: runtime error: shift exponent -1 is 
negative":
    The PCIe Root port was not initialized properly, the interrupt pin was left 
0. This
    is a long standing issue exposed by the new test. (Patch 1/7)
  - 'make check' fails on 32-bit:
     Fix it by changing the ivshmem mem size from 4G
     to 1G, since 4G is not a valid value on 32-bit archs. (Patch 2/7)
     (4G is truncated to 0 on 32-bit systems)
  - Rebased on mst's pci branch.
  Since all the new changes are not related to the series, I kept the existing
  "Reviewed-by"/"Tested-by" signatures.

v3 -> v4:
 Addressed Igor's comments (thanks for the productive review!)
 - Split pxb test patch (previously patch 3/3) into the test itself (patch 1/6) 
and the blobs (patch 6/6).
 - New patch declaring pxb/pxb-pxie as not hot-pluggable.
    - Note that it does not solve the DSDT issue, but it is a prerequisite for 
the next patch.
 - New patch solving the DSDT issue spotted by Igor.
     - Using V=1 DIFF=diff make check does make it easier to review the ACPI 
changes, thanks.
 - Patches 4 and 5 untouched (previously patches 1/3 and 2/3) 

v2 -> v3:
 - split original series "pci: better support for 64-bit MMIO allocation" into 
2 series:
    - this is the first part dealing with correct 64-bit MMIO ACPI computation
    - the second one will include 64-bit MMIO reservation for PCI hotplug
 - Add pxb/pxb-pcie tests (Igor) - See diffs below (*)
 - Re-based on latest master.
   
v1 -> v2:
 - resolved some styling issues (Laszlo)
 - rebase on latest master (Laszlo)



64-bit BARs allocations fix for devices behind PXBs/PXB-PCIEs.

In build_crs() the calculation and merging of the ranges already happens
in 64-bit, but the entry boundaries are silently truncated to 32-bit in the
call to aml_dword_memory(). Fix it by handling the 64-bit MMIO ranges 
separately.


Thank you,
Marcel

Marcel Apfelbaum (7):
  hw/pcie-root-port: Fix PCIe root port initialization
  tests/acpi: add pxb/pxb-pcie tests
  hw/pxb: declare pxb devices as not hot-pluggable
  hw/acpi: fix a DSDT table issue when a pxb is present.
  acpi: refactor pxb crs computation
  hw/apci: handle 64-bit MMIO regions correctly
  tests/acpi: Add pxb/pxb-pcie tests blobs

 hw/i386/acpi-build.c                   | 131 ++++++++++++++++++++++++---------
 hw/pci-bridge/ioh3420.c                |   1 +
 hw/pci-bridge/pci_expander_bridge.c    |   2 +
 tests/acpi-test-data/pc/DSDT.pxb       | Bin 0 -> 6286 bytes
 tests/acpi-test-data/q35/DSDT.pxb_pcie | Bin 0 -> 9098 bytes
 tests/bios-tables-test.c               |  37 ++++++++++
 6 files changed, 135 insertions(+), 36 deletions(-)
 create mode 100644 tests/acpi-test-data/pc/DSDT.pxb
 create mode 100644 tests/acpi-test-data/q35/DSDT.pxb_pcie

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2.4.3