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[Qemu-devel] [PATCH v12 05/27] acpi: enable INTR for DMAR report structu
From: |
Peter Xu |
Subject: |
[Qemu-devel] [PATCH v12 05/27] acpi: enable INTR for DMAR report structure |
Date: |
Thu, 14 Jul 2016 13:56:14 +0800 |
In ACPI DMA remapping report structure, enable INTR flag when specified.
Signed-off-by: Peter Xu <address@hidden>
---
hw/i386/acpi-build.c | 14 +++++++++++++-
include/hw/i386/intel_iommu.h | 2 ++
2 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 12ecf95..06682f1 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -59,6 +59,7 @@
#include "qapi/qmp/qint.h"
#include "qom/qom-qobject.h"
+#include "hw/i386/x86-iommu.h"
#include "hw/acpi/ipmi.h"
@@ -2454,6 +2455,10 @@ build_mcfg_q35(GArray *table_data, BIOSLinker *linker,
AcpiMcfgInfo *info)
build_header(linker, table_data, (void *)mcfg, sig, len, 1, NULL, NULL);
}
+/*
+ * VT-d spec 8.1 DMA Remapping Reporting Structure
+ * (version Oct. 2014 or later)
+ */
static void
build_dmar_q35(GArray *table_data, BIOSLinker *linker)
{
@@ -2461,10 +2466,17 @@ build_dmar_q35(GArray *table_data, BIOSLinker *linker)
AcpiTableDmar *dmar;
AcpiDmarHardwareUnit *drhd;
+ uint8_t dmar_flags = 0;
+ X86IOMMUState *iommu = x86_iommu_get_default();
+
+ assert(iommu);
+ if (iommu->intr_supported) {
+ dmar_flags |= 0x1; /* Flags: 0x1: INT_REMAP */
+ }
dmar = acpi_data_push(table_data, sizeof(*dmar));
dmar->host_address_width = VTD_HOST_ADDRESS_WIDTH - 1;
- dmar->flags = 0; /* No intr_remap for now */
+ dmar->flags = dmar_flags;
/* DMAR Remapping Hardware Unit Definition structure */
drhd = acpi_data_push(table_data, sizeof(*drhd));
diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h
index 0794309..741242e 100644
--- a/include/hw/i386/intel_iommu.h
+++ b/include/hw/i386/intel_iommu.h
@@ -44,6 +44,8 @@
#define VTD_HOST_ADDRESS_WIDTH 39
#define VTD_HAW_MASK ((1ULL << VTD_HOST_ADDRESS_WIDTH) - 1)
+#define DMAR_REPORT_F_INTR (1)
+
typedef struct VTDContextEntry VTDContextEntry;
typedef struct VTDContextCacheEntry VTDContextCacheEntry;
typedef struct IntelIOMMUState IntelIOMMUState;
--
2.4.11
- [Qemu-devel] [PATCH v12 00/27] IOMMU: Enable interrupt remapping for Intel IOMMU, Peter Xu, 2016/07/14
- [Qemu-devel] [PATCH v12 01/27] x86-iommu: introduce parent class, Peter Xu, 2016/07/14
- [Qemu-devel] [PATCH v12 02/27] intel_iommu: rename VTD_PCI_DEVFN_MAX to x86-iommu, Peter Xu, 2016/07/14
- [Qemu-devel] [PATCH v12 03/27] x86-iommu: provide x86_iommu_get_default, Peter Xu, 2016/07/14
- [Qemu-devel] [PATCH v12 04/27] x86-iommu: introduce "intremap" property, Peter Xu, 2016/07/14
- [Qemu-devel] [PATCH v12 05/27] acpi: enable INTR for DMAR report structure,
Peter Xu <=
- [Qemu-devel] [PATCH v12 06/27] intel_iommu: allow queued invalidation for IR, Peter Xu, 2016/07/14
- [Qemu-devel] [PATCH v12 07/27] intel_iommu: set IR bit for ECAP register, Peter Xu, 2016/07/14
- [Qemu-devel] [PATCH v12 08/27] acpi: add DMAR scope definition for root IOAPIC, Peter Xu, 2016/07/14
- [Qemu-devel] [PATCH v12 09/27] intel_iommu: define interrupt remap table addr register, Peter Xu, 2016/07/14
- [Qemu-devel] [PATCH v12 10/27] intel_iommu: handle interrupt remap enable, Peter Xu, 2016/07/14
- [Qemu-devel] [PATCH v12 11/27] intel_iommu: define several structs for IOMMU IR, Peter Xu, 2016/07/14
- [Qemu-devel] [PATCH v12 12/27] intel_iommu: add IR translation faults defines, Peter Xu, 2016/07/14
- [Qemu-devel] [PATCH v12 13/27] intel_iommu: Add support for PCI MSI remap, Peter Xu, 2016/07/14