Re: [Qemu-devel] [PATCH v1 0/4] Connect the Xilinx ZynqMP IPI device

[Alistair Francis]

On Tue, Jul 5, 2016 at 1:37 PM, Peter Maydell <address@hidden> wrote:
> On 5 July 2016 at 21:30, Alistair Francis <address@hidden> wrote:
>> This patchset adds and connects the Xilinx ZynqmP IPI devices using the
>> register GPIO line.
>>
>> This requires adding the register GPIO API which allows registers to be
>> mapped to GPIOs. This GPIO is used to propergate register reads/writes
>> to other devices and other registers.
>>
>> This is useful to update register values in other devices when events
>> occur.
>
> I (still) don't think this is useful enough to be worth it.
> In fact you can see in patch 4 the problems it causes,
> because the register API has left you with named GPIOs
> like "PMU_0", "PMU_1", etc rather than a single array
> of GPIOs named "PMU", which then means you can't loop
> through wiring it up.

I think a single array would be very confusing to connect and
understand what is going on as there are so many connections here. But
I see your point.

I still think this is helpful as there are a large number of cases
where setting a bit in a register propagates through the system to
somewhere else. We use this functionality to control the VINITI pin
for the R5 in our tree and many other use cases where it is very
helpful to directly map a bit to the GPIO line.

Is there any chance I can convince you that this is useful and get it merged?

Thanks,

Alistair

>
> thanks
> -- PMM
>