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[Qemu-devel] [PULL 07/16] target-i386: TCG can support CPUID.07H:EBX.erm
From: |
Eduardo Habkost |
Subject: |
[Qemu-devel] [PULL 07/16] target-i386: TCG can support CPUID.07H:EBX.erms |
Date: |
Thu, 7 Jul 2016 16:59:13 -0300 |
From: Paolo Bonzini <address@hidden>
ERMS just says "rep movsb" and "rep stosb" are fast. It does not
imply any new instruction, so we can support it easily.
Signed-off-by: Paolo Bonzini <address@hidden>
Reviewed-by: Eduardo Habkost <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>
---
target-i386/cpu.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 3bd3cfc..2227f22 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -358,10 +358,11 @@ static const char *cpuid_6_feature_name[] = {
#define TCG_7_0_EBX_FEATURES (CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_SMAP | \
CPUID_7_0_EBX_BMI1 | CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ADX | \
CPUID_7_0_EBX_PCOMMIT | CPUID_7_0_EBX_CLFLUSHOPT | \
- CPUID_7_0_EBX_CLWB | CPUID_7_0_EBX_MPX | CPUID_7_0_EBX_FSGSBASE)
+ CPUID_7_0_EBX_CLWB | CPUID_7_0_EBX_MPX | CPUID_7_0_EBX_FSGSBASE | \
+ CPUID_7_0_EBX_ERMS)
/* missing:
CPUID_7_0_EBX_HLE, CPUID_7_0_EBX_AVX2,
- CPUID_7_0_EBX_ERMS, CPUID_7_0_EBX_INVPCID, CPUID_7_0_EBX_RTM,
+ CPUID_7_0_EBX_INVPCID, CPUID_7_0_EBX_RTM,
CPUID_7_0_EBX_RDSEED */
#define TCG_7_0_ECX_FEATURES (CPUID_7_0_ECX_PKU | CPUID_7_0_ECX_OSPKE)
#define TCG_APM_FEATURES 0
--
2.5.5
- [Qemu-devel] [PULL 00/16] x86 and machine queue, 2016-07-07, Eduardo Habkost, 2016/07/07
- [Qemu-devel] [PULL 01/16] qdev: Don't stop applying globals on first error, Eduardo Habkost, 2016/07/07
- [Qemu-devel] [PULL 02/16] qdev: Eliminate qemu_add_globals() function, Eduardo Habkost, 2016/07/07
- [Qemu-devel] [PULL 04/16] machine: Add machine_register_compat_props() function, Eduardo Habkost, 2016/07/07
- [Qemu-devel] [PULL 03/16] qdev: GlobalProperty.errp field, Eduardo Habkost, 2016/07/07
- [Qemu-devel] [PULL 05/16] vl: Set errp to &error_abort on machine compat_props, Eduardo Habkost, 2016/07/07
- [Qemu-devel] [PULL 06/16] target-sparc: Use sparc_cpu_parse_features() directly, Eduardo Habkost, 2016/07/07
- [Qemu-devel] [PULL 07/16] target-i386: TCG can support CPUID.07H:EBX.erms,
Eduardo Habkost <=
- [Qemu-devel] [PULL 08/16] target-i386: Avoid using locals outside their scope, Eduardo Habkost, 2016/07/07
- [Qemu-devel] [PULL 09/16] cpu: Use CPUClass->parse_features() as convertor to global properties, Eduardo Habkost, 2016/07/07
- [Qemu-devel] [PULL 11/16] pc: Parse CPU features only once, Eduardo Habkost, 2016/07/07
- [Qemu-devel] [PULL 10/16] arm: virt: Parse cpu_model only once, Eduardo Habkost, 2016/07/07
- [Qemu-devel] [PULL 15/16] target-i386: Publish advised value of MSR_IA32_FEATURE_CONTROL via fw_cfg, Eduardo Habkost, 2016/07/07
- [Qemu-devel] [PULL 12/16] target-i386: Show host and VM TSC frequencies on mismatch, Eduardo Habkost, 2016/07/07
- [Qemu-devel] [PULL 13/16] target-i386: Report hyperv feature words through qom, Eduardo Habkost, 2016/07/07
- [Qemu-devel] [PULL 14/16] target-i386: kvm: Add basic Intel LMCE support, Eduardo Habkost, 2016/07/07
- [Qemu-devel] [PULL 16/16] target-i386: Enable LMCE for '-cpu host' if supported by host, Eduardo Habkost, 2016/07/07
- Re: [Qemu-devel] [PULL 00/16] x86 and machine queue, 2016-07-07, Peter Maydell, 2016/07/11