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[Qemu-devel] [PATCH 03/18] target-*: Clean up cpu.h header guards


From: Markus Armbruster
Subject: [Qemu-devel] [PATCH 03/18] target-*: Clean up cpu.h header guards
Date: Wed, 29 Jun 2016 17:55:50 +0200

Most of them use guard symbols like CPU_$target_H, but we also have
__MIPS_CPU_H__ and __TRICORE_CPU_H__.  They all upset
scripts/clean-header-guards.pl.

The script dislikes CPU_$target_H because they don't match their file
name (they should, to make guard collisions less likely).  The others
are reserved identifiers.

Clean them all up: use guard symbol $target_CPU_H for
target-$target/cpu.h.

Signed-off-by: Markus Armbruster <address@hidden>
---
 target-alpha/cpu.h      | 6 +++---
 target-arm/cpu.h        | 4 ++--
 target-cris/cpu.h       | 5 +++--
 target-i386/cpu.h       | 7 ++++---
 target-lm32/cpu.h       | 4 ++--
 target-m68k/cpu.h       | 5 +++--
 target-microblaze/cpu.h | 5 +++--
 target-mips/cpu.h       | 6 +++---
 target-moxie/cpu.h      | 7 ++++---
 target-openrisc/cpu.h   | 6 +++---
 target-ppc/cpu.h        | 7 ++++---
 target-s390x/cpu.h      | 5 +++--
 target-sh4/cpu.h        | 7 ++++---
 target-sparc/cpu.h      | 4 ++--
 target-tilegx/cpu.h     | 5 +++--
 target-tricore/cpu.h    | 7 ++++---
 target-xtensa/cpu.h     | 4 ++--
 17 files changed, 52 insertions(+), 42 deletions(-)

diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h
index e71ea70..c79fbeb 100644
--- a/target-alpha/cpu.h
+++ b/target-alpha/cpu.h
@@ -17,8 +17,8 @@
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
 
-#if !defined (__CPU_ALPHA_H__)
-#define __CPU_ALPHA_H__
+#ifndef ALPHA_CPU_H
+#define ALPHA_CPU_H
 
 #include "qemu-common.h"
 #include "cpu-qom.h"
@@ -525,4 +525,4 @@ static inline void cpu_get_tb_cpu_state(CPUAlphaState *env, 
target_ulong *pc,
     *pflags = flags;
 }
 
-#endif /* !defined (__CPU_ALPHA_H__) */
+#endif /* ALPHA_CPU_H */
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 7938ddc..230aafa 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -16,9 +16,9 @@
  * You should have received a copy of the GNU Lesser General Public
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
-#ifndef CPU_ARM_H
-#define CPU_ARM_H
 
+#ifndef ARM_CPU_H
+#define ARM_CPU_H
 
 #include "kvm-consts.h"
 
diff --git a/target-cris/cpu.h b/target-cris/cpu.h
index d8c47a6..cd73d86 100644
--- a/target-cris/cpu.h
+++ b/target-cris/cpu.h
@@ -17,8 +17,9 @@
  * You should have received a copy of the GNU Lesser General Public
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
-#ifndef CPU_CRIS_H
-#define CPU_CRIS_H
+
+#ifndef CRIS_CPU_H
+#define CRIS_CPU_H
 
 #include "qemu-common.h"
 #include "cpu-qom.h"
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index d9ab884..e881251 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -16,8 +16,9 @@
  * You should have received a copy of the GNU Lesser General Public
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
-#ifndef CPU_I386_H
-#define CPU_I386_H
+
+#ifndef I386_CPU_H
+#define I386_CPU_H
 
 #include "qemu-common.h"
 #include "cpu-qom.h"
@@ -1591,4 +1592,4 @@ void x86_cpu_dump_local_apic_state(CPUState *cs, FILE *f,
 /* cpu.c */
 bool cpu_is_bsp(X86CPU *cpu);
 
-#endif /* CPU_I386_H */
+#endif /* I386_CPU_H */
diff --git a/target-lm32/cpu.h b/target-lm32/cpu.h
index 62880f7..50a1fbb 100644
--- a/target-lm32/cpu.h
+++ b/target-lm32/cpu.h
@@ -17,8 +17,8 @@
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
 
-#ifndef CPU_LM32_H
-#define CPU_LM32_H
+#ifndef LM32_CPU_H
+#define LM32_CPU_H
 
 #define TARGET_LONG_BITS 32
 
diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h
index 008a057..08e214d 100644
--- a/target-m68k/cpu.h
+++ b/target-m68k/cpu.h
@@ -17,8 +17,9 @@
  * You should have received a copy of the GNU Lesser General Public
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
-#ifndef CPU_M68K_H
-#define CPU_M68K_H
+
+#ifndef M68K_CPU_H
+#define M68K_CPU_H
 
 #define TARGET_LONG_BITS 32
 
diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h
index d17cf1e..679fce5 100644
--- a/target-microblaze/cpu.h
+++ b/target-microblaze/cpu.h
@@ -16,8 +16,9 @@
  * You should have received a copy of the GNU Lesser General Public
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
-#ifndef CPU_MICROBLAZE_H
-#define CPU_MICROBLAZE_H
+
+#ifndef MICROBLAZE_CPU_H
+#define MICROBLAZE_CPU_H
 
 #include "qemu-common.h"
 #include "cpu-qom.h"
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index c2da5ec..a0bccb1 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -1,5 +1,5 @@
-#if !defined (__MIPS_CPU_H__)
-#define __MIPS_CPU_H__
+#ifndef MIPS_CPU_H
+#define MIPS_CPU_H
 
 //#define DEBUG_OP
 
@@ -1062,4 +1062,4 @@ static inline void QEMU_NORETURN 
do_raise_exception(CPUMIPSState *env,
     do_raise_exception_err(env, exception, 0, pc);
 }
 
-#endif /* !defined (__MIPS_CPU_H__) */
+#endif /* MIPS_CPU_H */
diff --git a/target-moxie/cpu.h b/target-moxie/cpu.h
index c10898e..d9a5790 100644
--- a/target-moxie/cpu.h
+++ b/target-moxie/cpu.h
@@ -16,8 +16,9 @@
  * You should have received a copy of the GNU General Public License
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
-#ifndef _CPU_MOXIE_H
-#define _CPU_MOXIE_H
+
+#ifndef MOXIE_CPU_H
+#define MOXIE_CPU_H
 
 #include "qemu-common.h"
 
@@ -141,4 +142,4 @@ static inline void cpu_get_tb_cpu_state(CPUMoxieState *env, 
target_ulong *pc,
 int moxie_cpu_handle_mmu_fault(CPUState *cpu, vaddr address,
                                int rw, int mmu_idx);
 
-#endif /* _CPU_MOXIE_H */
+#endif /* MOXIE_CPU_H */
diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h
index 810a280..87c2f47 100644
--- a/target-openrisc/cpu.h
+++ b/target-openrisc/cpu.h
@@ -17,8 +17,8 @@
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
 
-#ifndef CPU_OPENRISC_H
-#define CPU_OPENRISC_H
+#ifndef OPENRISC_CPU_H
+#define OPENRISC_CPU_H
 
 #define TARGET_LONG_BITS 32
 
@@ -410,4 +410,4 @@ static inline int cpu_mmu_index(CPUOpenRISCState *env, bool 
ifetch)
 
 #define CPU_INTERRUPT_TIMER   CPU_INTERRUPT_TGT_INT_0
 
-#endif /* CPU_OPENRISC_H */
+#endif /* OPENRISC_CPU_H */
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index b1354a4..52a8c7d 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -16,8 +16,9 @@
  * You should have received a copy of the GNU Lesser General Public
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
-#if !defined (__CPU_PPC_H__)
-#define __CPU_PPC_H__
+
+#ifndef PPC_CPU_H
+#define PPC_CPU_H
 
 #include "qemu-common.h"
 
@@ -2422,4 +2423,4 @@ int ppc_get_vcpu_dt_id(PowerPCCPU *cpu);
 PowerPCCPU *ppc_get_vcpu_by_dt_id(int cpu_dt_id);
 
 void ppc_maybe_bswap_register(CPUPPCState *env, uint8_t *mem_buf, int len);
-#endif /* !defined (__CPU_PPC_H__) */
+#endif /* PPC_CPU_H */
diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
index c7cc4e1..e3bbcf1 100644
--- a/target-s390x/cpu.h
+++ b/target-s390x/cpu.h
@@ -19,8 +19,9 @@
  * You should have received a copy of the GNU (Lesser) General Public
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
-#ifndef CPU_S390X_H
-#define CPU_S390X_H
+
+#ifndef S390X_CPU_H
+#define S390X_CPU_H
 
 #include "qemu-common.h"
 #include "cpu-qom.h"
diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h
index 3f5c689..6e894d8 100644
--- a/target-sh4/cpu.h
+++ b/target-sh4/cpu.h
@@ -16,8 +16,9 @@
  * You should have received a copy of the GNU Lesser General Public
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
-#ifndef _CPU_SH4_H
-#define _CPU_SH4_H
+
+#ifndef SH4_CPU_H
+#define SH4_CPU_H
 
 #include "qemu-common.h"
 #include "cpu-qom.h"
@@ -389,4 +390,4 @@ static inline void cpu_get_tb_cpu_state(CPUSH4State *env, 
target_ulong *pc,
             | (env->movcal_backup ? TB_FLAG_PENDING_MOVCA : 0); /* Bit 4 */
 }
 
-#endif                         /* _CPU_SH4_H */
+#endif /* SH4_CPU_H */
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index ba37f4b..4c5546a 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -1,5 +1,5 @@
-#ifndef CPU_SPARC_H
-#define CPU_SPARC_H
+#ifndef SPARC_CPU_H
+#define SPARC_CPU_H
 
 #include "qemu-common.h"
 #include "qemu/bswap.h"
diff --git a/target-tilegx/cpu.h b/target-tilegx/cpu.h
index b9b588d..4422caa 100644
--- a/target-tilegx/cpu.h
+++ b/target-tilegx/cpu.h
@@ -16,8 +16,9 @@
  * You should have received a copy of the GNU Lesser General Public
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
-#ifndef CPU_TILEGX_H
-#define CPU_TILEGX_H
+
+#ifndef TILEGX_CPU_H
+#define TILEGX_CPU_H
 
 #include "qemu-common.h"
 
diff --git a/target-tricore/cpu.h b/target-tricore/cpu.h
index 3c6f7b7..1067870 100644
--- a/target-tricore/cpu.h
+++ b/target-tricore/cpu.h
@@ -16,8 +16,9 @@
  * You should have received a copy of the GNU Lesser General Public
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
-#if !defined(__TRICORE_CPU_H__)
-#define __TRICORE_CPU_H__
+
+#ifndef TRICORE_CPU_H
+#define TRICORE_CPU_H
 
 #include "tricore-defs.h"
 #include "qemu-common.h"
@@ -422,4 +423,4 @@ int cpu_tricore_handle_mmu_fault(CPUState *cpu, 
target_ulong address,
                                  int rw, int mmu_idx);
 #define cpu_handle_mmu_fault cpu_tricore_handle_mmu_fault
 
-#endif /*__TRICORE_CPU_H__ */
+#endif /* TRICORE_CPU_H */
diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h
index 442176a..49fea40 100644
--- a/target-xtensa/cpu.h
+++ b/target-xtensa/cpu.h
@@ -25,8 +25,8 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-#ifndef CPU_XTENSA_H
-#define CPU_XTENSA_H
+#ifndef XTENSA_CPU_H
+#define XTENSA_CPU_H
 
 #define ALIGNED_ONLY
 #define TARGET_LONG_BITS 32
-- 
2.5.5




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