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[Qemu-devel] [PULL 10/17] ppc: Fix POWER7 and POWER8 exception definitio
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 10/17] ppc: Fix POWER7 and POWER8 exception definitions |
Date: |
Thu, 23 Jun 2016 15:48:39 +1000 |
From: Benjamin Herrenschmidt <address@hidden>
We were initializing unused ones and missing some
Signed-off-by: Benjamin Herrenschmidt <address@hidden>
Reviewed-by: David Gibson <address@hidden>
[clg: fixed checkpatch.pl errors ]
Signed-off-by: Cédric Le Goater <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target-ppc/cpu.h | 11 ++++++++++-
target-ppc/translate_init.c | 27 +++++++++++++++++++++------
2 files changed, 31 insertions(+), 7 deletions(-)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 93c2dd5..f005549 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -116,6 +116,9 @@ enum {
POWERPC_EXCP_HYPPRIV = 41, /* Embedded hypervisor priv instruction */
/* Vectors 42 to 63 are reserved */
/* Exceptions defined in the PowerPC server specification */
+ /* Server doorbell variants */
+#define POWERPC_EXCP_SDOOR POWERPC_EXCP_GDOORI
+#define POWERPC_EXCP_SDOOR_HV POWERPC_EXCP_DOORI
POWERPC_EXCP_RESET = 64, /* System reset exception */
POWERPC_EXCP_DSEG = 65, /* Data segment exception */
POWERPC_EXCP_ISEG = 66, /* Instruction segment exception */
@@ -158,8 +161,12 @@ enum {
/* VSX Unavailable (Power ISA 2.06 and later) */
POWERPC_EXCP_VSXU = 94, /* VSX Unavailable */
POWERPC_EXCP_FU = 95, /* Facility Unavailable */
+ /* Additional ISA 2.06 and later server exceptions */
+ POWERPC_EXCP_HV_EMU = 96, /* HV emulation assistance */
+ POWERPC_EXCP_HV_MAINT = 97, /* HMI */
+ POWERPC_EXCP_HV_FU = 98, /* Hypervisor Facility unavailable */
/* EOL */
- POWERPC_EXCP_NB = 96,
+ POWERPC_EXCP_NB = 99,
/* QEMU exceptions: used internally during code translation */
POWERPC_EXCP_STOP = 0x200, /* stop translation */
POWERPC_EXCP_BRANCH = 0x201, /* branch instruction */
@@ -2196,6 +2203,8 @@ enum {
PPC_INTERRUPT_CDOORBELL, /* Critical doorbell interrupt */
PPC_INTERRUPT_DOORBELL, /* Doorbell interrupt */
PPC_INTERRUPT_PERFM, /* Performance monitor interrupt */
+ PPC_INTERRUPT_HMI, /* Hypervisor Maintainance interrupt */
+ PPC_INTERRUPT_HDOORBELL, /* Hypervisor Doorbell interrupt */
};
/* Processor Compatibility mask (PCR) */
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index db56a39..01a490c 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -3180,18 +3180,30 @@ static void init_excp_POWER7 (CPUPPCState *env)
env->excp_vectors[POWERPC_EXCP_HDECR] = 0x00000980;
env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
env->excp_vectors[POWERPC_EXCP_TRACE] = 0x00000D00;
+ env->excp_vectors[POWERPC_EXCP_HDSI] = 0x00000E00;
+ env->excp_vectors[POWERPC_EXCP_HISI] = 0x00000E20;
+ env->excp_vectors[POWERPC_EXCP_HV_EMU] = 0x00000E40;
+ env->excp_vectors[POWERPC_EXCP_HV_MAINT] = 0x00000E60;
env->excp_vectors[POWERPC_EXCP_PERFM] = 0x00000F00;
env->excp_vectors[POWERPC_EXCP_VPU] = 0x00000F20;
env->excp_vectors[POWERPC_EXCP_VSXU] = 0x00000F40;
- env->excp_vectors[POWERPC_EXCP_FU] = 0x00000F60;
- env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300;
- env->excp_vectors[POWERPC_EXCP_MAINT] = 0x00001600;
- env->excp_vectors[POWERPC_EXCP_VPUA] = 0x00001700;
- env->excp_vectors[POWERPC_EXCP_THERM] = 0x00001800;
/* Hardware reset vector */
env->hreset_vector = 0x0000000000000100ULL;
#endif
}
+
+static void init_excp_POWER8(CPUPPCState *env)
+{
+ init_excp_POWER7(env);
+
+#if !defined(CONFIG_USER_ONLY)
+ env->excp_vectors[POWERPC_EXCP_SDOOR] = 0x00000A00;
+ env->excp_vectors[POWERPC_EXCP_FU] = 0x00000F60;
+ env->excp_vectors[POWERPC_EXCP_HV_FU] = 0x00000F80;
+ env->excp_vectors[POWERPC_EXCP_SDOOR_HV] = 0x00000E80;
+#endif
+}
+
#endif
/*****************************************************************************/
@@ -8132,10 +8144,13 @@ static void init_proc_book3s_64(CPUPPCState *env, int
version)
ppc970_irq_init(ppc_env_get_cpu(env));
break;
case BOOK3S_CPU_POWER7:
- case BOOK3S_CPU_POWER8:
init_excp_POWER7(env);
ppcPOWER7_irq_init(ppc_env_get_cpu(env));
break;
+ case BOOK3S_CPU_POWER8:
+ init_excp_POWER8(env);
+ ppcPOWER7_irq_init(ppc_env_get_cpu(env));
+ break;
default:
g_assert_not_reached();
}
--
2.5.5
- [Qemu-devel] [PULL 17/17] ppc: Disable huge page support if it is not available for main RAM, (continued)
- [Qemu-devel] [PULL 17/17] ppc: Disable huge page support if it is not available for main RAM, David Gibson, 2016/06/23
- [Qemu-devel] [PULL 03/17] ppc64: disable gen_pause() for linux-user mode, David Gibson, 2016/06/23
- [Qemu-devel] [PULL 07/17] ppc: Fix rfi/rfid/hrfi/... emulation, David Gibson, 2016/06/23
- [Qemu-devel] [PULL 09/17] ppc: fix exception model for HV mode, David Gibson, 2016/06/23
- [Qemu-devel] [PULL 05/17] ppc: Improve emulation of THRM registers, David Gibson, 2016/06/23
- [Qemu-devel] [PULL 11/17] ppc: Fix generation if ISI/DSI vs. HV mode, David Gibson, 2016/06/23
- [Qemu-devel] [PULL 14/17] ppc: Turn a bunch of booleans from int to bool, David Gibson, 2016/06/23
- [Qemu-devel] [PULL 08/17] ppc: define a default LPCR value, David Gibson, 2016/06/23
- [Qemu-devel] [PULL 15/17] ppc: Move exception generation code out of line, David Gibson, 2016/06/23
- [Qemu-devel] [PULL 12/17] ppc: Rework generation of priv and inval interrupts, David Gibson, 2016/06/23
- [Qemu-devel] [PULL 10/17] ppc: Fix POWER7 and POWER8 exception definitions,
David Gibson <=
- [Qemu-devel] [PULL 16/17] ppc: Add P7/P8 Power Management instructions, David Gibson, 2016/06/23
- [Qemu-devel] [PULL 13/17] ppc: Add real mode CI load/store instructions for P7 and P8, David Gibson, 2016/06/23
- [Qemu-devel] [PULL 04/17] target-ppc: Fix rlwimi, rlwinm, rlwnm again, David Gibson, 2016/06/23
- Re: [Qemu-devel] [PULL 00/17] ppc-for-2.7 queue 20160623, Peter Maydell, 2016/06/23