Re: [Qemu-devel] [PATCH] target-i386: TCG can support CPUID.07H:EBX.erms

[Eduardo Habkost]

On Fri, Jun 17, 2016 at 05:47:13PM +0200, Paolo Bonzini wrote:
> ERMS just says "rep movsb" and "rep stosb" are fast.  It does not
> imply any new instruction, so we can support it easily.
> 
> Signed-off-by: Paolo Bonzini <address@hidden>

Reviewed-by: Eduardo Habkost <address@hidden>

Applied to x86-next. Thanks.

> ---
>  target-i386/cpu.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/target-i386/cpu.c b/target-i386/cpu.c
> index 3665fec..3871eb8 100644
> --- a/target-i386/cpu.c
> +++ b/target-i386/cpu.c
> @@ -358,10 +358,11 @@ static const char *cpuid_6_feature_name[] = {
>  #define TCG_7_0_EBX_FEATURES (CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_SMAP | \
>            CPUID_7_0_EBX_BMI1 | CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ADX | \
>            CPUID_7_0_EBX_PCOMMIT | CPUID_7_0_EBX_CLFLUSHOPT |            \
> -          CPUID_7_0_EBX_CLWB | CPUID_7_0_EBX_MPX | CPUID_7_0_EBX_FSGSBASE)
> +          CPUID_7_0_EBX_CLWB | CPUID_7_0_EBX_MPX | CPUID_7_0_EBX_FSGSBASE | \
> +          CPUID_7_0_EBX_ERMS)
>            /* missing:
>            CPUID_7_0_EBX_HLE, CPUID_7_0_EBX_AVX2,
> -          CPUID_7_0_EBX_ERMS, CPUID_7_0_EBX_INVPCID, CPUID_7_0_EBX_RTM,
> +          CPUID_7_0_EBX_INVPCID, CPUID_7_0_EBX_RTM,
>            CPUID_7_0_EBX_RDSEED */
>  #define TCG_7_0_ECX_FEATURES (CPUID_7_0_ECX_PKU | CPUID_7_0_ECX_OSPKE)
>  #define TCG_APM_FEATURES 0
> -- 
> 2.5.5
> 

-- 
Eduardo