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[Qemu-devel] [PATCH v10 18/26] ioapic: register IOMMU IEC notifier for i
From: |
Peter Xu |
Subject: |
[Qemu-devel] [PATCH v10 18/26] ioapic: register IOMMU IEC notifier for ioapic |
Date: |
Tue, 21 Jun 2016 15:47:46 +0800 |
Let IOAPIC the first consumer of x86 IOMMU IEC invalidation
notifiers. This is only used for split irqchip case, when vIOMMU
receives IR invalidation requests, IOAPIC will be notified to update
kernel irq routes. For simplicity, we just update all IOAPIC routes,
even if the invalidated entries are not IOAPIC ones.
Since now we are creating IOMMUs using "-device" parameter, IOMMU
device will be created after IOAPIC. We need to do the registration
after machine done by leveraging machine_done notifier.
Signed-off-by: Peter Xu <address@hidden>
---
hw/intc/ioapic.c | 29 +++++++++++++++++++++++++++++
include/hw/i386/ioapic_internal.h | 2 ++
2 files changed, 31 insertions(+)
diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c
index c4469e4..0c34e3e 100644
--- a/hw/intc/ioapic.c
+++ b/hw/intc/ioapic.c
@@ -31,6 +31,7 @@
#include "sysemu/kvm.h"
#include "target-i386/cpu.h"
#include "hw/i386/apic-msidef.h"
+#include "hw/i386/x86-iommu.h"
//#define DEBUG_IOAPIC
@@ -198,6 +199,14 @@ static void ioapic_update_kvm_routes(IOAPICCommonState *s)
#endif
}
+static void ioapic_iec_notifier(void *private, bool global,
+ uint32_t index, uint32_t mask)
+{
+ IOAPICCommonState *s = (IOAPICCommonState *)private;
+ /* For simplicity, we just update all the routes */
+ ioapic_update_kvm_routes(s);
+}
+
void ioapic_eoi_broadcast(int vector)
{
IOAPICCommonState *s;
@@ -354,6 +363,24 @@ static const MemoryRegionOps ioapic_io_ops = {
.endianness = DEVICE_NATIVE_ENDIAN,
};
+static void ioapic_machine_done_notify(Notifier *notifier, void *data)
+{
+ IOAPICCommonState *s = container_of(notifier, IOAPICCommonState,
+ machine_done);
+
+#ifdef CONFIG_KVM
+ if (kvm_irqchip_is_split()) {
+ X86IOMMUState *iommu = x86_iommu_get_default();
+ if (iommu) {
+ /* Register this IOAPIC with IOMMU IEC notifier, so that
+ * when there are IR invalidates, we can be notified to
+ * update kernel IR cache. */
+ x86_iommu_iec_register_notifier(iommu, ioapic_iec_notifier, s);
+ }
+ }
+#endif
+}
+
static void ioapic_realize(DeviceState *dev, Error **errp)
{
IOAPICCommonState *s = IOAPIC_COMMON(dev);
@@ -364,6 +391,8 @@ static void ioapic_realize(DeviceState *dev, Error **errp)
qdev_init_gpio_in(dev, ioapic_set_irq, IOAPIC_NUM_PINS);
ioapics[ioapic_no] = s;
+ s->machine_done.notify = ioapic_machine_done_notify;
+ qemu_add_machine_init_done_notifier(&s->machine_done);
}
static void ioapic_class_init(ObjectClass *klass, void *data)
diff --git a/include/hw/i386/ioapic_internal.h
b/include/hw/i386/ioapic_internal.h
index 31dafb3..84e3deb 100644
--- a/include/hw/i386/ioapic_internal.h
+++ b/include/hw/i386/ioapic_internal.h
@@ -25,6 +25,7 @@
#include "hw/hw.h"
#include "exec/memory.h"
#include "hw/sysbus.h"
+#include "qemu/notify.h"
#define MAX_IOAPICS 1
@@ -107,6 +108,7 @@ struct IOAPICCommonState {
uint8_t ioregsel;
uint32_t irr;
uint64_t ioredtbl[IOAPIC_NUM_PINS];
+ Notifier machine_done;
};
void ioapic_reset_common(DeviceState *dev);
--
2.4.11
- [Qemu-devel] [PATCH v10 08/26] acpi: add DMAR scope definition for root IOAPIC, (continued)
- [Qemu-devel] [PATCH v10 08/26] acpi: add DMAR scope definition for root IOAPIC, Peter Xu, 2016/06/21
- [Qemu-devel] [PATCH v10 09/26] intel_iommu: define interrupt remap table addr register, Peter Xu, 2016/06/21
- [Qemu-devel] [PATCH v10 10/26] intel_iommu: handle interrupt remap enable, Peter Xu, 2016/06/21
- [Qemu-devel] [PATCH v10 11/26] intel_iommu: define several structs for IOMMU IR, Peter Xu, 2016/06/21
- [Qemu-devel] [PATCH v10 12/26] intel_iommu: add IR translation faults defines, Peter Xu, 2016/06/21
- [Qemu-devel] [PATCH v10 13/26] intel_iommu: Add support for PCI MSI remap, Peter Xu, 2016/06/21
- [Qemu-devel] [PATCH v10 14/26] q35: ioapic: add support for emulated IOAPIC IR, Peter Xu, 2016/06/21
- [Qemu-devel] [PATCH v10 15/26] ioapic: introduce ioapic_entry_parse() helper, Peter Xu, 2016/06/21
- [Qemu-devel] [PATCH v10 16/26] intel_iommu: add support for split irqchip, Peter Xu, 2016/06/21
- [Qemu-devel] [PATCH v10 17/26] x86-iommu: introduce IEC notifiers, Peter Xu, 2016/06/21
- [Qemu-devel] [PATCH v10 18/26] ioapic: register IOMMU IEC notifier for ioapic,
Peter Xu <=
- [Qemu-devel] [PATCH v10 19/26] intel_iommu: Add support for Extended Interrupt Mode, Peter Xu, 2016/06/21
- [Qemu-devel] [PATCH v10 20/26] intel_iommu: add SID validation for IR, Peter Xu, 2016/06/21
- [Qemu-devel] [PATCH v10 21/26] kvm-irqchip: simplify kvm_irqchip_add_msi_route, Peter Xu, 2016/06/21
- [Qemu-devel] [PATCH v10 22/26] kvm-irqchip: i386: add hook for add/remove virq, Peter Xu, 2016/06/21
- [Qemu-devel] [PATCH v10 23/26] kvm-irqchip: x86: add msi route notify fn, Peter Xu, 2016/06/21
- [Qemu-devel] [PATCH v10 24/26] kvm-irqchip: do explicit commit when update irq, Peter Xu, 2016/06/21
- [Qemu-devel] [PATCH v10 25/26] intel_iommu: support all masks in interrupt entry cache invalidation, Peter Xu, 2016/06/21
- [Qemu-devel] [PATCH v10 26/26] kvm-all: add trace events for kvm irqchip ops, Peter Xu, 2016/06/21