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[Qemu-devel] [PULL 1/8] ppc/spapr: Refactor h_client_architecture_suppor
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 1/8] ppc/spapr: Refactor h_client_architecture_support() CPU parsing code |
Date: |
Tue, 14 Jun 2016 15:54:43 +1000 |
From: Thomas Huth <address@hidden>
The h_client_architecture_support() function has become quite big
and nested already. So factor out the code that takes care of the
sPAPR compatibility PVRs (which will be modified by the following
patches).
Signed-off-by: Thomas Huth <address@hidden>
Reviewed-by: Michael Roth <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/spapr_hcall.c | 61 +++++++++++++++++++++++++++++++---------------------
1 file changed, 36 insertions(+), 25 deletions(-)
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index 9a3f4ec..bb8f4de 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -922,6 +922,39 @@ static void do_set_compat(void *arg)
((cpuver) == CPU_POWERPC_LOGICAL_2_06_PLUS) ? 2061 : \
((cpuver) == CPU_POWERPC_LOGICAL_2_07) ? 2070 : 0)
+static void cas_handle_compat_cpu(PowerPCCPUClass *pcc, uint32_t pvr,
+ unsigned max_lvl, unsigned *compat_lvl,
+ unsigned *cpu_version)
+{
+ unsigned lvl = get_compat_level(pvr);
+ bool is205, is206;
+
+ if (!lvl) {
+ return;
+ }
+
+ /* If it is a logical PVR, try to determine the highest level */
+ is205 = (pcc->pcr_mask & PCR_COMPAT_2_05) &&
+ (lvl == get_compat_level(CPU_POWERPC_LOGICAL_2_05));
+ is206 = (pcc->pcr_mask & PCR_COMPAT_2_06) &&
+ ((lvl == get_compat_level(CPU_POWERPC_LOGICAL_2_06)) ||
+ (lvl == get_compat_level(CPU_POWERPC_LOGICAL_2_06_PLUS)));
+
+ if (is205 || is206) {
+ if (!max_lvl) {
+ /* User did not set the level, choose the highest */
+ if (*compat_lvl <= lvl) {
+ *compat_lvl = lvl;
+ *cpu_version = pvr;
+ }
+ } else if (max_lvl >= lvl) {
+ /* User chose the level, don't set higher than this */
+ *compat_lvl = lvl;
+ *cpu_version = pvr;
+ }
+ }
+}
+
#define OV5_DRCONF_MEMORY 0x20
static target_ulong h_client_architecture_support(PowerPCCPU *cpu_,
@@ -931,7 +964,7 @@ static target_ulong
h_client_architecture_support(PowerPCCPU *cpu_,
{
target_ulong list = ppc64_phys_to_real(args[0]);
target_ulong ov_table, ov5;
- PowerPCCPUClass *pcc_ = POWERPC_CPU_GET_CLASS(cpu_);
+ PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu_);
CPUState *cs;
bool cpu_match = false, cpu_update = true, memory_update = false;
unsigned old_cpu_version = cpu_->cpu_version;
@@ -958,29 +991,7 @@ static target_ulong
h_client_architecture_support(PowerPCCPU *cpu_,
cpu_match = true;
cpu_version = cpu_->cpu_version;
} else if (!cpu_match) {
- /* If it is a logical PVR, try to determine the highest level */
- unsigned lvl = get_compat_level(pvr);
- if (lvl) {
- bool is205 = (pcc_->pcr_mask & PCR_COMPAT_2_05) &&
- (lvl == get_compat_level(CPU_POWERPC_LOGICAL_2_05));
- bool is206 = (pcc_->pcr_mask & PCR_COMPAT_2_06) &&
- ((lvl == get_compat_level(CPU_POWERPC_LOGICAL_2_06)) ||
- (lvl == get_compat_level(CPU_POWERPC_LOGICAL_2_06_PLUS)));
-
- if (is205 || is206) {
- if (!max_lvl) {
- /* User did not set the level, choose the highest */
- if (compat_lvl <= lvl) {
- compat_lvl = lvl;
- cpu_version = pvr;
- }
- } else if (max_lvl >= lvl) {
- /* User chose the level, don't set higher than this */
- compat_lvl = lvl;
- cpu_version = pvr;
- }
- }
- }
+ cas_handle_compat_cpu(pcc, pvr, max_lvl, &compat_lvl,
&cpu_version);
}
/* Terminator record */
if (~pvr_mask & pvr) {
@@ -990,7 +1001,7 @@ static target_ulong
h_client_architecture_support(PowerPCCPU *cpu_,
/* Parsing finished */
trace_spapr_cas_pvr(cpu_->cpu_version, cpu_match,
- cpu_version, pcc_->pcr_mask);
+ cpu_version, pcc->pcr_mask);
/* Update CPUs */
if (old_cpu_version != cpu_version) {
--
2.5.5
- [Qemu-devel] [PULL 0/8] ppc-for-2.7 queue 20160614, David Gibson, 2016/06/14
- [Qemu-devel] [PULL 1/8] ppc/spapr: Refactor h_client_architecture_support() CPU parsing code,
David Gibson <=
- [Qemu-devel] [PULL 3/8] ppc: Provide function to get CPU class of the host CPU, David Gibson, 2016/06/14
- [Qemu-devel] [PULL 7/8] macio: call dma_memory_unmap() at the end of each DMA transfer, David Gibson, 2016/06/14
- [Qemu-devel] [PULL 4/8] ppc: Improve PCR bit selection in ppc_set_compat(), David Gibson, 2016/06/14
- [Qemu-devel] [PULL 6/8] Add PowerPC AT_HWCAP2 definitions, David Gibson, 2016/06/14
- [Qemu-devel] [PULL 5/8] ppc: Add PowerISA 2.07 compatibility mode, David Gibson, 2016/06/14
- [Qemu-devel] [PULL 2/8] ppc: Split pcr_mask settings into supported bits and the register mask, David Gibson, 2016/06/14
- [Qemu-devel] [PULL 8/8] spapr: Ensure all LMBs are represented in ibm, dynamic-memory, David Gibson, 2016/06/14
- Re: [Qemu-devel] [PULL 0/8] ppc-for-2.7 queue 20160614, Peter Maydell, 2016/06/14