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Re: [Qemu-devel] [PATCH v6 00/11] 8bit AVR cores
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH v6 00/11] 8bit AVR cores |
Date: |
Mon, 13 Jun 2016 09:12:58 -0700 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.1.0 |
On 06/12/2016 12:01 PM, Michael Rolnik wrote:
This series of patches adds 8bit AVR cores to QEMU.
All instruction, except BREAK/DES/SPM/SPMX, are implemented. Not fully tested
yet.
However I was able to execute simple code with functions. e.g fibonacci
calculation.
This series of patches include a non real, sample board.
No fuses support yet. PC is set to 0 at reset.
the patches include the following
1. just a basic 8bit AVR CPU, without instruction decoding or translation
2. CPU features which allow define the following 8bit AVR cores
avr1
avr2 avr25
avr3 avr31 avr35
avr4
avr5 avr51
avr6
xmega2 xmega4 xmega5 xmega6 xmega7
3. a definition of sample machine with SRAM, FLASH and CPU which allows to
execute simple code
4. encoding for all AVR instructions
5. interrupt handling
6. helpers for IN, OUT, SLEEP, WBR & unsupported instructions
7. a decoder which given an opcode decides what istruction it is
8. translation of AVR instruction into TCG
9. all features together
changes since v3
You should be continuing to add to this list of changes with every revision.
At present I'm having to go back and diff this against your previous patch
sets, something that most reviewers aren't going to do.
You need to keep up with checkpatch.pl warnings:
total: 0 errors, 0 warnings, 1214 lines checked
total: 0 errors, 0 warnings, 388 lines checked
total: 0 errors, 0 warnings, 361 lines checked
total: 0 errors, 0 warnings, 762 lines checked
total: 0 errors, 0 warnings, 69 lines checked
total: 0 errors, 0 warnings, 189 lines checked
total: 0 errors, 0 warnings, 693 lines checked
total: 2 errors, 0 warnings, 2743 lines checked
total: 0 errors, 0 warnings, 203 lines checked
total: 4 errors, 4 warnings, 115 lines checked
total: 276 errors, 30 warnings, 1285 lines checked
r~
- [Qemu-devel] [PATCH v6 06/11] target-avr: adding helpers for IN, OUT, SLEEP, WBR & unsupported instructions, (continued)
- [Qemu-devel] [PATCH v6 06/11] target-avr: adding helpers for IN, OUT, SLEEP, WBR & unsupported instructions, Michael Rolnik, 2016/06/12
- [Qemu-devel] [PATCH v6 09/11] target-avr: updating translate.c to use instructions translation, Michael Rolnik, 2016/06/12
- [Qemu-devel] [PATCH v6 07/11] target-avr: adding instruction decoder, Michael Rolnik, 2016/06/12
- [Qemu-devel] [PATCH v6 11/11] target-avr: decoder generator. currently not used by the build, can be used manually, Michael Rolnik, 2016/06/12
- [Qemu-devel] [PATCH v6 10/11] target-avr: saving sreg, rampD, rampX, rampY, rampD, eind in HW representation saving cpu features, Michael Rolnik, 2016/06/12
- [Qemu-devel] [PATCH v6 08/11] target-avr: adding instruction translation, Michael Rolnik, 2016/06/12
- Re: [Qemu-devel] [PATCH v6 00/11] 8bit AVR cores,
Richard Henderson <=