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[Qemu-devel] [RFC PATCH 2/3] tcg: Add support for fence generation in x8
From: |
Pranith Kumar |
Subject: |
[Qemu-devel] [RFC PATCH 2/3] tcg: Add support for fence generation in x86 backend |
Date: |
Tue, 24 May 2016 13:18:55 -0400 |
Signed-off-by: Pranith Kumar <address@hidden>
---
tcg/i386/tcg-target.h | 1 +
tcg/i386/tcg-target.inc.c | 9 +++++++++
tcg/tcg-opc.h | 2 +-
tcg/tcg.c | 1 +
4 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
index 92be341..93ea42e 100644
--- a/tcg/i386/tcg-target.h
+++ b/tcg/i386/tcg-target.h
@@ -100,6 +100,7 @@ extern bool have_bmi1;
#define TCG_TARGET_HAS_muls2_i32 1
#define TCG_TARGET_HAS_muluh_i32 0
#define TCG_TARGET_HAS_mulsh_i32 0
+#define TCG_TARGET_HAS_fence 1
#if TCG_TARGET_REG_BITS == 64
#define TCG_TARGET_HAS_extrl_i64_i32 0
diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c
index 238fa10..cf49272 100644
--- a/tcg/i386/tcg-target.inc.c
+++ b/tcg/i386/tcg-target.inc.c
@@ -347,6 +347,7 @@ static inline int tcg_target_const_match(tcg_target_long
val, TCGType type,
#define OPC_SHRX (0xf7 | P_EXT38 | P_SIMDF2)
#define OPC_TESTL (0x85)
#define OPC_XCHG_ax_r32 (0x90)
+#define OPC_MFENCE (0xAE | P_EXT)
#define OPC_GRP3_Ev (0xf7)
#define OPC_GRP5 (0xff)
@@ -686,6 +687,14 @@ static inline void tcg_out_pushi(TCGContext *s,
tcg_target_long val)
}
}
+static inline void tcg_out_fence(TCGContext *s)
+{
+ /* TODO: Figure out an appropriate place for the encoding */
+ tcg_out8(s, 0x0F);
+ tcg_out8(s, 0xAE);
+ tcg_out8(s, 0xF0);
+}
+
static inline void tcg_out_push(TCGContext *s, int reg)
{
tcg_out_opc(s, OPC_PUSH_r32 + LOWREGMASK(reg), 0, reg, 0);
diff --git a/tcg/tcg-opc.h b/tcg/tcg-opc.h
index 4696cf1..b772d90 100644
--- a/tcg/tcg-opc.h
+++ b/tcg/tcg-opc.h
@@ -42,7 +42,7 @@ DEF(br, 0, 0, 1, TCG_OPF_BB_END)
# define IMPL64 TCG_OPF_64BIT
#endif
-DEF(fence, 0, 0, 0, 0)
+DEF(fence, 0, 0, 0, TCG_OPF_SIDE_EFFECTS)
DEF(mov_i32, 1, 1, 0, TCG_OPF_NOT_PRESENT)
DEF(movi_i32, 1, 0, 1, TCG_OPF_NOT_PRESENT)
diff --git a/tcg/tcg.c b/tcg/tcg.c
index b5a22ba..461a33e 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -2444,6 +2444,7 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb)
dead_args, sync_args);
break;
case INDEX_op_fence:
+ tcg_out_fence(s);
break;
default:
/* Sanity check that we've not introduced any unhandled opcodes. */
--
2.8.3