[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH v2] target-i386: implement CPUID[0xB] (Extended
From: |
Radim Krčmář |
Subject: |
Re: [Qemu-devel] [PATCH v2] target-i386: implement CPUID[0xB] (Extended Topology Enumeration) |
Date: |
Thu, 12 May 2016 19:25:58 +0200 |
2016-05-12 19:15+0200, Radim Krčmář:
> I looked at a dozen Intel CPU that have this CPUID and all of them
> always had Core offset as 1 (a wasted bit when hyperthreading is
> disabled) and Package offset at least 4 (wasted bits at <= 4 cores).
>
> QEMU uses more compact IDs and it doesn't make much sense to change it
> now. I keep the SMT and Core sub-leaves even if there is just one
> thread/core; it makes the code simpler and there should be no harm.
>
> Signed-off-by: Radim Krčmář <address@hidden>
> ---
> diff --git a/target-i386/cpu.c b/target-i386/cpu.c
> @@ -35,6 +35,7 @@
> @@ -2460,6 +2461,36 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
> uint32_t count,
> *edx = 0;
> }
> break;
> + case 0xB:
> + /* Extended Topology Enumeration Leaf */
> + if (!cpu->enable_cpuid_0xb) {
> + *eax = *ebx = *ecx = *edx = 0;
> + break;
> + }
> +
> + *ecx = count & 0xff;
> + *edx = cpu->apic_id;
> +
> + switch (*ecx) {
I missed *ecx -> count from v1 reviews. Sending v3, sorry.