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[Qemu-devel] [PATCH v2 03/24] target-sparc: Store mmu index in TB flags
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v2 03/24] target-sparc: Store mmu index in TB flags |
Date: |
Tue, 23 Feb 2016 13:11:39 -0800 |
Doing this instead of saving the raw PS_PRIV and TL. This means
that all nucleus mode TBs (TL > 0) can be shared. This fixes a
bug in that we didn't include HS_PRIV in the TB flags, and so could
produce incorrect TB matches for hypervisor state.
The LSU and DMMU states were unused by the translator. Including
them in TB flags meant unnecessary mismatches from tb_find_fast.
Signed-off-by: Richard Henderson <address@hidden>
---
target-sparc/cpu.h | 26 ++++++++++++--------------
target-sparc/translate.c | 2 +-
2 files changed, 13 insertions(+), 15 deletions(-)
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index dc46122..66c0ee9 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -684,34 +684,32 @@ void cpu_tick_set_limit(CPUTimer *timer, uint64_t limit);
trap_state* cpu_tsptr(CPUSPARCState* env);
#endif
-#define TB_FLAG_FPU_ENABLED (1 << 4)
-#define TB_FLAG_AM_ENABLED (1 << 5)
+#define TB_FLAG_MMU_MASK 7
+#define TB_FLAG_FPU_ENABLED (1 << 4)
+#define TB_FLAG_AM_ENABLED (1 << 5)
static inline void cpu_get_tb_cpu_state(CPUSPARCState *env, target_ulong *pc,
- target_ulong *cs_base, int *flags)
+ target_ulong *cs_base, int *pflags)
{
+ int flags;
*pc = env->pc;
*cs_base = env->npc;
+ flags = cpu_mmu_index(env, false);
#ifdef TARGET_SPARC64
- // AM . Combined FPU enable bits . PRIV . DMMU enabled . IMMU enabled
- *flags = (env->pstate & PS_PRIV) /* 2 */
- | ((env->lsu & (DMMU_E | IMMU_E)) >> 2) /* 1, 0 */
- | ((env->tl & 0xff) << 8)
- | (env->dmmu.mmu_primary_context << 16); /* 16... */
if (env->pstate & PS_AM) {
- *flags |= TB_FLAG_AM_ENABLED;
+ flags |= TB_FLAG_AM_ENABLED;
}
- if ((env->def->features & CPU_FEATURE_FLOAT) && (env->pstate & PS_PEF)
+ if ((env->def->features & CPU_FEATURE_FLOAT)
+ && (env->pstate & PS_PEF)
&& (env->fprs & FPRS_FEF)) {
- *flags |= TB_FLAG_FPU_ENABLED;
+ flags |= TB_FLAG_FPU_ENABLED;
}
#else
- // FPU enable . Supervisor
- *flags = env->psrs;
if ((env->def->features & CPU_FEATURE_FLOAT) && env->psref) {
- *flags |= TB_FLAG_FPU_ENABLED;
+ flags |= TB_FLAG_FPU_ENABLED;
}
#endif
+ *pflags = flags;
}
static inline bool tb_fpu_enabled(int tb_flags)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 964735b..98cd62f 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -5233,7 +5233,7 @@ void gen_intermediate_code(CPUSPARCState * env,
TranslationBlock * tb)
last_pc = dc->pc;
dc->npc = (target_ulong) tb->cs_base;
dc->cc_op = CC_OP_DYNAMIC;
- dc->mem_idx = cpu_mmu_index(env, false);
+ dc->mem_idx = tb->flags & TB_FLAG_MMU_MASK;
dc->def = env->def;
dc->fpu_enabled = tb_fpu_enabled(tb->flags);
dc->address_mask_32bit = tb_am_enabled(tb->flags);
--
2.5.0
- [Qemu-devel] [PATCH v2 00/24] target-sparc improvements, Richard Henderson, 2016/02/23
- [Qemu-devel] [PATCH v2 03/24] target-sparc: Store mmu index in TB flags,
Richard Henderson <=
- [Qemu-devel] [PATCH v2 02/24] target-sparc: Remove softint as a TCG global, Richard Henderson, 2016/02/23
- [Qemu-devel] [PATCH v2 01/24] target-sparc: Mark more flags for helpers, Richard Henderson, 2016/02/23
- [Qemu-devel] [PATCH v2 04/24] target-sparc: Create gen_exception, Richard Henderson, 2016/02/23
- [Qemu-devel] [PATCH v2 05/24] target-sparc: Unify asi handling between 32 and 64-bit, Richard Henderson, 2016/02/23
- [Qemu-devel] [PATCH v2 06/24] target-sparc: Store %asi in TB flags, Richard Henderson, 2016/02/23
- [Qemu-devel] [PATCH v2 07/24] target-sparc: Introduce get_asi, Richard Henderson, 2016/02/23
- [Qemu-devel] [PATCH v2 10/24] target-sparc: Add UA2005 defines to asi.h, Richard Henderson, 2016/02/23
- [Qemu-devel] [PATCH v2 09/24] target-sparc: Import linux/arch/sparc/include/uapi/asm/asi.h, Richard Henderson, 2016/02/23
- [Qemu-devel] [PATCH v2 08/24] target-sparc: Pass TCGMemOp to gen_ld/st_asi, Richard Henderson, 2016/02/23
- [Qemu-devel] [PATCH v2 14/24] target-sparc: Introduce gen_check_align, Richard Henderson, 2016/02/23