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[Qemu-devel] [PULL 11/15] cpu: Add callback to check architectural watch
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 11/15] cpu: Add callback to check architectural watchpoint match |
Date: |
Tue, 9 Feb 2016 18:43:01 +0000 |
From: Sergey Fedorov <address@hidden>
When QEMU watchpoint matches, that is not definitely an architectural
watchpoint match yet. If it is a stop-before-access watchpoint then that
is hardly possible to ignore it after throwing a TCG exception.
A special callback is introduced to check for architectural watchpoint
match before raising a TCG exception.
Signed-off-by: Sergey Fedorov <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
exec.c | 6 ++++++
include/qom/cpu.h | 4 ++++
qom/cpu.c | 9 +++++++++
3 files changed, 19 insertions(+)
diff --git a/exec.c b/exec.c
index ab37360..a26b80f 100644
--- a/exec.c
+++ b/exec.c
@@ -2025,6 +2025,7 @@ static const MemoryRegionOps notdirty_mem_ops = {
static void check_watchpoint(int offset, int len, MemTxAttrs attrs, int flags)
{
CPUState *cpu = current_cpu;
+ CPUClass *cc = CPU_GET_CLASS(cpu);
CPUArchState *env = cpu->env_ptr;
target_ulong pc, cs_base;
target_ulong vaddr;
@@ -2050,6 +2051,11 @@ static void check_watchpoint(int offset, int len,
MemTxAttrs attrs, int flags)
wp->hitaddr = vaddr;
wp->hitattrs = attrs;
if (!cpu->watchpoint_hit) {
+ if (wp->flags & BP_CPU &&
+ !cc->debug_check_watchpoint(cpu, wp)) {
+ wp->flags &= ~BP_WATCHPOINT_HIT;
+ continue;
+ }
cpu->watchpoint_hit = wp;
tb_check_watchpoint(cpu);
if (wp->flags & BP_STOP_BEFORE_ACCESS) {
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index 035179c..984bc8d 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -64,6 +64,7 @@ typedef uint64_t vaddr;
#define CPU_GET_CLASS(obj) OBJECT_GET_CLASS(CPUClass, (obj), TYPE_CPU)
typedef struct CPUState CPUState;
+typedef struct CPUWatchpoint CPUWatchpoint;
typedef void (*CPUUnassignedAccess)(CPUState *cpu, hwaddr addr,
bool is_write, bool is_exec, int opaque,
@@ -106,6 +107,8 @@ struct TranslationBlock;
* a memory access with the specified memory transaction attributes.
* @gdb_read_register: Callback for letting GDB read a register.
* @gdb_write_register: Callback for letting GDB write a register.
+ * @debug_check_watchpoint: Callback: return true if the architectural
+ * watchpoint whose address has matched should really fire.
* @debug_excp_handler: Callback for handling debug exceptions.
* @write_elf64_note: Callback for writing a CPU-specific ELF note to a
* 64-bit VM coredump.
@@ -165,6 +168,7 @@ typedef struct CPUClass {
int (*asidx_from_attrs)(CPUState *cpu, MemTxAttrs attrs);
int (*gdb_read_register)(CPUState *cpu, uint8_t *buf, int reg);
int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg);
+ bool (*debug_check_watchpoint)(CPUState *cpu, CPUWatchpoint *wp);
void (*debug_excp_handler)(CPUState *cpu);
int (*write_elf64_note)(WriteCoreDumpFunction f, CPUState *cpu,
diff --git a/qom/cpu.c b/qom/cpu.c
index 38dc713..aeb32f1 100644
--- a/qom/cpu.c
+++ b/qom/cpu.c
@@ -189,6 +189,14 @@ static int cpu_common_gdb_write_register(CPUState *cpu,
uint8_t *buf, int reg)
return 0;
}
+static bool cpu_common_debug_check_watchpoint(CPUState *cpu, CPUWatchpoint *wp)
+{
+ /* If no extra check is required, QEMU watchpoint match can be considered
+ * as an architectural match.
+ */
+ return true;
+}
+
bool target_words_bigendian(void);
static bool cpu_common_virtio_is_big_endian(CPUState *cpu)
{
@@ -353,6 +361,7 @@ static void cpu_class_init(ObjectClass *klass, void *data)
k->gdb_write_register = cpu_common_gdb_write_register;
k->virtio_is_big_endian = cpu_common_virtio_is_big_endian;
k->debug_excp_handler = cpu_common_noop;
+ k->debug_check_watchpoint = cpu_common_debug_check_watchpoint;
k->cpu_exec_enter = cpu_common_noop;
k->cpu_exec_exit = cpu_common_noop;
k->cpu_exec_interrupt = cpu_common_exec_interrupt;
--
1.9.1
- [Qemu-devel] [PULL 00/15] target-arm queue, Peter Maydell, 2016/02/09
- [Qemu-devel] [PULL 13/15] sd: limit 'req.cmd' while using as an array index, Peter Maydell, 2016/02/09
- [Qemu-devel] [PULL 14/15] hw/arm/virt: fix max-cpus check, Peter Maydell, 2016/02/09
- [Qemu-devel] [PULL 15/15] bcm2835_property: implement "get board revision" query, Peter Maydell, 2016/02/09
- [Qemu-devel] [PULL 09/15] target-arm: Fix IL bit reported for Thumb coprocessor traps, Peter Maydell, 2016/02/09
- [Qemu-devel] [PULL 10/15] target-arm: Fix IL bit reported for Thumb VFP and Neon traps, Peter Maydell, 2016/02/09
- [Qemu-devel] [PULL 03/15] target-arm: Use access_trap_aa32s_el1() for SCR and MVBAR, Peter Maydell, 2016/02/09
- [Qemu-devel] [PULL 07/15] target-arm: Enable EL3 for Cortex-A53 and Cortex-A57, Peter Maydell, 2016/02/09
- [Qemu-devel] [PULL 12/15] target-arm: Implement checking of fired watchpoint, Peter Maydell, 2016/02/09
- [Qemu-devel] [PULL 11/15] cpu: Add callback to check architectural watchpoint match,
Peter Maydell <=
- [Qemu-devel] [PULL 08/15] target-arm: Correct misleading 'is_thumb' syn_* parameter names, Peter Maydell, 2016/02/09
- [Qemu-devel] [PULL 02/15] target-arm: Implement MDCR_EL3 and SDCR, Peter Maydell, 2016/02/09
- [Qemu-devel] [PULL 01/15] target-arm: Fix typo in comment in arm_is_secure_below_el3(), Peter Maydell, 2016/02/09
- [Qemu-devel] [PULL 04/15] target-arm: Update arm_generate_debug_exceptions() to handle EL2/EL3, Peter Maydell, 2016/02/09
- [Qemu-devel] [PULL 06/15] target-arm: Implement NSACR trapping behaviour, Peter Maydell, 2016/02/09
- [Qemu-devel] [PULL 05/15] target-arm: Add isread parameter to CPAccessFns, Peter Maydell, 2016/02/09
- Re: [Qemu-devel] [PULL 00/15] target-arm queue, Peter Maydell, 2016/02/11