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[Qemu-devel] [PATCH v2 0/5] Extend the performance monitoring registers
From: |
Alistair Francis |
Subject: |
[Qemu-devel] [PATCH v2 0/5] Extend the performance monitoring registers |
Date: |
Fri, 5 Feb 2016 16:55:14 -0800 |
This patch set is based on the patch sent by Christopher Covington and
written by Aaron Lindsay which was sent as an RFC (Implement remaining
PMU functionality).
It adds a few performance monitoring related registers.
V2:
- Add Aaron to the signed off lines
- Add the tested-by lines from Nathan
- Add two more patches from Chris
Alistair Francis (5):
target-arm: Add the pmceid0 and pmceid1 registers
target-arm: Add Some of the performance monitor registers
target-arm: Add the pmovsclr_el0 and pmintenclr_el1 registers
target-arm: Add PMUSERENR_EL0 register
target-arm: Unmask PMU bits in debug feature register
target-arm/cpu-qom.h | 2 +
target-arm/cpu.c | 2 +
target-arm/cpu.h | 6 +++
target-arm/cpu64.c | 2 +
target-arm/helper.c | 122 ++++++++++++++++++++++++++++++++++++++++++++-------
5 files changed, 117 insertions(+), 17 deletions(-)
--
2.5.0
- [Qemu-devel] [PATCH v2 0/5] Extend the performance monitoring registers,
Alistair Francis <=
[Qemu-devel] [PATCH v2 2/5] target-arm: Add Some of the performance monitor registers, Alistair Francis, 2016/02/05