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Re: [Qemu-devel] [PATCHv2 08/10] target-ppc: Add new TLB invalidate by H
From: |
David Gibson |
Subject: |
Re: [Qemu-devel] [PATCHv2 08/10] target-ppc: Add new TLB invalidate by HPTE call for hash64 MMUs |
Date: |
Thu, 28 Jan 2016 16:57:28 +1100 |
User-agent: |
Mutt/1.5.24 (2015-08-30) |
On Thu, Jan 28, 2016 at 03:33:18PM +1100, Benjamin Herrenschmidt wrote:
> On Wed, 2016-01-27 at 21:13 +1100, David Gibson wrote:
> > When HPTEs are removed or modified by hypercalls on spapr, we need to
> > invalidate the relevant pages in the qemu TLB.
> >
> > Currently we do that by doing some complicated calculations to work out the
> > right encoding for the tlbie instruction, then passing that to
> > ppc_tlb_invalidate_one()... which totally ignores the argument and flushes
> > the whole tlb.
> >
> > Avoid that by adding a new flush-by-hpte helper in mmu-hash64.c.
>
> Should we find a better "in between" so long run we implement tlbie
> properly ? IE, tlbie will give us the page size using the same encoding
> as the HPTE iirc when L=1 ? To be honest the encoding of tlbie in arch
> 2.07 is so completely insane I have a hard time figuring it out myself
> ... :-)
I'm not entirely sure what the better in-between would be. Having the
pagesize in tlbie isn't enough on its own - the bigger problem is that
we need a way of invalidating a whole congruence class of entries in
the qemu TLB, which it doesn't currently provide a means to do.
> Otherwise,
>
> Acked-by: Benjamin Herrenschmidt <address@hidden>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- Re: [Qemu-devel] [PATCHv2 06/10] target-ppc: Remove unused mmu models from ppc_tlb_invalidate_one, (continued)
- [Qemu-devel] [PATCHv2 05/10] target-ppc: Use actual page size encodings from HPTE, David Gibson, 2016/01/27
- [Qemu-devel] [PATCHv2 03/10] target-ppc: Rework ppc_store_slb, David Gibson, 2016/01/27
- [Qemu-devel] [PATCHv2 04/10] target-ppc: Rework SLB page size lookup, David Gibson, 2016/01/27
- [Qemu-devel] [PATCHv2 08/10] target-ppc: Add new TLB invalidate by HPTE call for hash64 MMUs, David Gibson, 2016/01/27
- [Qemu-devel] [PATCHv2 02/10] target-ppc: Convert mmu-hash{32, 64}.[ch] from CPUPPCState to PowerPCCPU, David Gibson, 2016/01/27
- [Qemu-devel] [PATCHv2 01/10] target-ppc: Remove unused kvmppc_read_segment_page_sizes() stub, David Gibson, 2016/01/27
- [Qemu-devel] [PATCHv2 09/10] target-ppc: Helper to determine page size information from hpte alone, David Gibson, 2016/01/27
- [Qemu-devel] [PATCHv2 10/10] target-ppc: Allow more page sizes for POWER7 & POWER8 in TCG, David Gibson, 2016/01/27
- Re: [Qemu-devel] [PATCHv2 00/10] Clean up page size handling for ppc 64-bit hash MMUs with TCG, Alexander Graf, 2016/01/28