Re: [Qemu-devel] [PATCH v7 5/6] xlnx-zynqmp: Connect the SPI devices

[Peter Maydell]

This patch in this series never made it to the list for some reason;
replying to it here as the easiest way to get it recorded.

-- PMM

On 15 January 2016 at 22:38, Alistair Francis
<address@hidden> wrote:
> Connect the Xilinx SPI devices to the ZynqMP model.
>
> Signed-off-by: Alistair Francis <address@hidden>
> Reviewed-by: Peter Crosthwaite <address@hidden>
> [ PC changes
>  * Use QOM alias for bus connectivity on SoC level
> ]
> Signed-off-by: Peter Crosthwaite <address@hidden>
> ---
>  hw/arm/xlnx-zynqmp.c         | 30 ++++++++++++++++++++++++++++++
>  include/hw/arm/xlnx-zynqmp.h |  3 +++
>  2 files changed, 33 insertions(+)
>
> diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
> index f26efd8..e306172 100644
> --- a/hw/arm/xlnx-zynqmp.c
> +++ b/hw/arm/xlnx-zynqmp.c
> @@ -56,6 +56,14 @@ static const int sdhci_intr[XLNX_ZYNQMP_NUM_SDHCI] = {
>      48, 49,
>  };
>
> +static const uint64_t spi_addr[XLNX_ZYNQMP_NUM_SPIS] = {
> +    0xFF040000, 0xFF050000,
> +};
> +
> +static const int spi_intr[XLNX_ZYNQMP_NUM_SPIS] = {
> +    19, 20,
> +};
> +
>  typedef struct XlnxZynqMPGICRegion {
>      int region_index;
>      uint32_t address;
> @@ -117,6 +125,12 @@ static void xlnx_zynqmp_init(Object *obj)
>          qdev_set_parent_bus(DEVICE(&s->sdhci[i]),
>                              sysbus_get_default());
>      }
> +
> +    for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) {
> +        object_initialize(&s->spi[i], sizeof(s->spi[i]),
> +                          TYPE_XILINX_SPIPS);
> +        qdev_set_parent_bus(DEVICE(&s->spi[i]), sysbus_get_default());
> +    }
>  }
>
>  static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
> @@ -323,6 +337,22 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error 
> **errp)
>          sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci[i]), 0,
>                             gic_spi[sdhci_intr[i]]);
>      }
> +
> +    for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) {
> +        gchar *bus_name;
> +
> +        object_property_set_bool(OBJECT(&s->spi[i]), true, "realized", &err);
> +
> +        sysbus_mmio_map(SYS_BUS_DEVICE(&s->spi[i]), 0, spi_addr[i]);
> +        sysbus_connect_irq(SYS_BUS_DEVICE(&s->spi[i]), 0,
> +                           gic_spi[spi_intr[i]]);
> +
> +        /* Alias controller SPI bus to the SoC itself */
> +        bus_name = g_strdup_printf("spi%d", i);
> +        object_property_add_alias(OBJECT(s), bus_name,
> +                                  OBJECT(&s->spi[i]), "spi0",
> +                                  &error_abort);
> +    }
>  }
>
>  static Property xlnx_zynqmp_props[] = {
> diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h
> index 1eba937..2332596 100644
> --- a/include/hw/arm/xlnx-zynqmp.h
> +++ b/include/hw/arm/xlnx-zynqmp.h
> @@ -25,6 +25,7 @@
>  #include "hw/ide/pci.h"
>  #include "hw/ide/ahci.h"
>  #include "hw/sd/sdhci.h"
> +#include "hw/ssi/xilinx_spips.h"
>
>  #define TYPE_XLNX_ZYNQMP "xlnx,zynqmp"
>  #define XLNX_ZYNQMP(obj) OBJECT_CHECK(XlnxZynqMPState, (obj), \
> @@ -35,6 +36,7 @@
>  #define XLNX_ZYNQMP_NUM_GEMS 4
>  #define XLNX_ZYNQMP_NUM_UARTS 2
>  #define XLNX_ZYNQMP_NUM_SDHCI 2
> +#define XLNX_ZYNQMP_NUM_SPIS 2
>
>  #define XLNX_ZYNQMP_NUM_OCM_BANKS 4
>  #define XLNX_ZYNQMP_OCM_RAM_0_ADDRESS 0xFFFC0000
> @@ -78,6 +80,7 @@ typedef struct XlnxZynqMPState {
>      CadenceUARTState uart[XLNX_ZYNQMP_NUM_UARTS];
>      SysbusAHCIState sata;
>      SDHCIState sdhci[XLNX_ZYNQMP_NUM_SDHCI];
> +    XilinxSPIPS spi[XLNX_ZYNQMP_NUM_SPIS];
>
>      char *boot_cpu;
>      ARMCPU *boot_cpu_ptr;
> --
> 2.5.0