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[Qemu-devel] [PATCH 13/13] cuda.c: add delay to setting of SR_INT bit
From: |
Mark Cave-Ayland |
Subject: |
[Qemu-devel] [PATCH 13/13] cuda.c: add delay to setting of SR_INT bit |
Date: |
Fri, 23 Oct 2015 14:56:38 +0100 |
MacOS 9 is racy when it comes to accessing the shift register. Fix this by
introducing a small delay between data accesses and raising the SR_INT
interrupt bit.
Signed-off-by: Mark Cave-Ayland <address@hidden>
---
hw/misc/macio/cuda.c | 44 +++++++++++++++++++++++++++++++++-----------
hw/ppc/mac.h | 3 +++
2 files changed, 36 insertions(+), 11 deletions(-)
diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c
index d864b24..5156c72 100644
--- a/hw/misc/macio/cuda.c
+++ b/hw/misc/macio/cuda.c
@@ -248,6 +248,31 @@ static void cuda_timer2(void *opaque)
cuda_update_irq(s);
}
+static void cuda_set_sr_int(void *opaque)
+{
+ CUDAState *s = opaque;
+
+ CUDA_DPRINTF("CUDA: %s:%d\n", __func__, __LINE__);
+ s->ifr |= SR_INT;
+ cuda_update_irq(s);
+}
+
+static void cuda_delay_set_sr_int(CUDAState *s)
+{
+ int64_t expire;
+
+ if (s->dirb == 0xff) {
+ /* Not in Mac OS, fire the IRQ directly */
+ cuda_set_sr_int(s);
+ return;
+ }
+
+ CUDA_DPRINTF("CUDA: %s:%d\n", __func__, __LINE__);
+
+ expire = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 300 * SCALE_US;
+ timer_mod(s->sr_delay_timer, expire);
+}
+
static uint32_t cuda_readb(void *opaque, hwaddr addr)
{
CUDAState *s = opaque;
@@ -418,8 +443,7 @@ static void cuda_update(CUDAState *s)
if (s->data_out_index < sizeof(s->data_out)) {
CUDA_DPRINTF("send: %02x\n", s->sr);
s->data_out[s->data_out_index++] = s->sr;
- s->ifr |= SR_INT;
- cuda_update_irq(s);
+ cuda_delay_set_sr_int(s);
}
}
} else {
@@ -432,8 +456,7 @@ static void cuda_update(CUDAState *s)
if (s->data_in_index >= s->data_in_size) {
s->b = (s->b | TREQ);
}
- s->ifr |= SR_INT;
- cuda_update_irq(s);
+ cuda_delay_set_sr_int(s);
}
}
}
@@ -445,15 +468,13 @@ static void cuda_update(CUDAState *s)
s->b = (s->b | TREQ);
else
s->b = (s->b & ~TREQ);
- s->ifr |= SR_INT;
- cuda_update_irq(s);
+ cuda_delay_set_sr_int(s);
} else {
if (!(s->last_b & TIP)) {
/* handle end of host to cuda transfer */
packet_received = (s->data_out_index > 0);
/* always an IRQ at the end of transfer */
- s->ifr |= SR_INT;
- cuda_update_irq(s);
+ cuda_delay_set_sr_int(s);
}
/* signal if there is data to read */
if (s->data_in_index < s->data_in_size) {
@@ -490,8 +511,7 @@ static void cuda_send_packet_to_host(CUDAState *s,
s->data_in_size = len;
s->data_in_index = 0;
cuda_update(s);
- s->ifr |= SR_INT;
- cuda_update_irq(s);
+ cuda_delay_set_sr_int(s);
}
static void cuda_adb_poll(void *opaque)
@@ -714,7 +734,7 @@ static void cuda_reset(DeviceState *dev)
s->b = 0;
s->a = 0;
- s->dirb = 0;
+ s->dirb = 0xff;
s->dira = 0;
s->sr = 0;
s->acr = 0;
@@ -732,6 +752,8 @@ static void cuda_reset(DeviceState *dev)
set_counter(s, &s->timers[0], 0xffff);
s->timers[1].latch = 0xffff;
+
+ s->sr_delay_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, cuda_set_sr_int, s);
}
static void cuda_realizefn(DeviceState *dev, Error **errp)
diff --git a/hw/ppc/mac.h b/hw/ppc/mac.h
index 8bdba30..e375ed2 100644
--- a/hw/ppc/mac.h
+++ b/hw/ppc/mac.h
@@ -103,6 +103,9 @@ typedef struct CUDAState {
uint8_t last_b;
uint8_t last_acr;
+ /* MacOS 9 is racy and requires a delay upon setting the SR_INT bit */
+ QEMUTimer *sr_delay_timer;
+
int data_in_size;
int data_in_index;
int data_out_index;
--
1.7.10.4
- [Qemu-devel] [PATCH 01/13] PPC: Allow Rc bit to be set on mtspr, (continued)
- [Qemu-devel] [PATCH 01/13] PPC: Allow Rc bit to be set on mtspr, Mark Cave-Ayland, 2015/10/23
- [Qemu-devel] [PATCH 05/13] cuda.c: fix CUDA_PACKET response packet format, Mark Cave-Ayland, 2015/10/23
- [Qemu-devel] [PATCH 02/13] PPC: Fix lsxw bounds checks, Mark Cave-Ayland, 2015/10/23
- [Qemu-devel] [PATCH 09/13] cuda.c: add defines for CUDA registers, Mark Cave-Ayland, 2015/10/23
- [Qemu-devel] [PATCH 03/13] PPC: mac99: Always add USB controller, Mark Cave-Ayland, 2015/10/23
- [Qemu-devel] [PATCH 06/13] cuda.c: implement simple CUDA_GET_6805_ADDR command, Mark Cave-Ayland, 2015/10/23
- [Qemu-devel] [PATCH 04/13] cuda.c: fix CUDA ADB error packet format, Mark Cave-Ayland, 2015/10/23
- [Qemu-devel] [PATCH 08/13] cuda.c: fix CUDA SR interrupt clearing, Mark Cave-Ayland, 2015/10/23
- [Qemu-devel] [PATCH 11/13] cuda.c: rename get_counter() state variable from s to ti for consistency, Mark Cave-Ayland, 2015/10/23
- [Qemu-devel] [PATCH 10/13] cuda.c: refactor get_tb() so that the time can be passed in, Mark Cave-Ayland, 2015/10/23
- [Qemu-devel] [PATCH 13/13] cuda.c: add delay to setting of SR_INT bit,
Mark Cave-Ayland <=
- [Qemu-devel] [PATCH 12/13] cuda.c: fix T2 timer and enable its interrupt, Mark Cave-Ayland, 2015/10/23
- Re: [Qemu-devel] [PATCH 00/13] Mac OS 9 compatibility improvements (upstream rework), Mark Cave-Ayland, 2015/10/30