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Re: [Qemu-devel] [PATCH v3] target-arm: Break the TB after ISB to execut


From: Sergey Sorokin
Subject: Re: [Qemu-devel] [PATCH v3] target-arm: Break the TB after ISB to execute self-modified code correctly
Date: Fri, 02 Oct 2015 15:11:04 +0300

Oh, sorry, I forgot about this. A lot of work now.
I'll send the patch.

01.10.2015, 15:12, "Peter Maydell" <address@hidden>:
> On 11 September 2015 at 16:55, Sergey Sorokin <address@hidden> wrote:
>>  11.09.2015, 18:44, "Peter Maydell" <address@hidden>:
>>>  On 9 September 2015 at 17:01, Sergey Sorokin <address@hidden> wrote:
>>>>   If any store instruction writes the code inside the same TB
>>>>   after this store insn, the execution of the TB must be stopped
>>>>   to execute new code correctly.
>>>>   As described in ARMv8 manual D3.4.6 a self-modified code need to do
>>>>   IC invalidation to be valid, and ISB after it. So it's enough to end the 
>>>> TB
>>>>   after ISB instruction on the code translation.
>>>>   Also this TB break is necessary to take any pending interrupts 
>>>> immediately
>>>>   according to ARMv8 ARM D1.14.4.
>>>>
>>>>   Signed-off-by: Sergey Sorokin <address@hidden>
>>>
>>>  This doesn't compile...
>>>
>>>  /home/petmay01/linaro/qemu-from-laptop/qemu/target-arm/translate.c: In
>>>  function ‘disas_thumb2_insn’:
>>>  
>>> /home/petmay01/linaro/qemu-from-laptop/qemu/target-arm/translate.c:10017:29:
>>>  error: ‘return’ with no value, in function returning non-void
>>>  [-Werror=return-type]
>>>                               return;
>>>                               ^
>
>>  Oh, sorry. I'll fix it next week.
>
> Just a nudge that I think I'm still waiting for the next round of
> this patchset from you?
>
> thanks
> -- PMM



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