Re: [Qemu-devel] [PATCH v2] spapr: generate DT node names

[Thomas Huth]

On 21/09/15 18:53, Laurent Vivier wrote:
> When DT node names for PCI devices are generated by SLOF,
> they are generated according to the type of the device
> (for instance, ethernet for virtio-net-pci device).
> 
> Node name for hotplugged devices is generated by QEMU.
> This patch adds the mechanic to QEMU to create the node
> name according to the device type too.
> 
> The data structure has been roughly copied from OpenBIOS/OpenHackware,
> node names from SLOF.
...
> Signed-off-by: Laurent Vivier <address@hidden>
> ---
> v2: Use CamelCase name, remove misc-* name,
>     remove _OTHER entries to fallback to class name (as SLOF does).
>     Fix typo (IPMI-bltr).
> 
>  hw/ppc/spapr_pci.c | 490 
> +++++++++++++++++++++++++++++++++++++++++++++++++++--
>  1 file changed, 476 insertions(+), 14 deletions(-)
> 
> diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
> index a2feb4c..eb53719 100644
> --- a/hw/ppc/spapr_pci.c
> +++ b/hw/ppc/spapr_pci.c
> @@ -944,6 +944,475 @@ static void populate_resource_props(PCIDevice *d, 
> ResourceProps *rp)
>      rp->assigned_len = assigned_idx * sizeof(ResourceFields);
>  }
>  
> +/* Device classes and subclasses */
> +
> +#define PCI_BASE_CLASS_STORAGE           0x01
> +#define PCI_SUBCLASS_STORAGE_SCSI        0x00
> +#define PCI_SUBCLASS_STORAGE_IDE         0x01
> +#define PCI_SUBCLASS_STORAGE_FLOPPY      0x02
> +#define PCI_SUBCLASS_STORAGE_IPI         0x03
> +#define PCI_SUBCLASS_STORAGE_RAID        0x04
> +#define PCI_SUBCLASS_STORAGE_ATA         0x05
> +#define PCI_SUBCLASS_STORAGE_SATA        0x06
> +#define PCI_SUBCLASS_STORAGE_SAS         0x07
> +#define PCI_SUBCLASS_STORAGE_OTHER       0x80
> +
> +#define PCI_BASE_CLASS_NETWORK           0x02
> +#define PCI_SUBCLASS_NETWORK_ETHERNET    0x00
> +#define PCI_SUBCLASS_NETWORK_TOKEN_RING  0x01
> +#define PCI_SUBCLASS_NETWORK_FDDI        0x02
> +#define PCI_SUBCLASS_NETWORK_ATM         0x03
> +#define PCI_SUBCLASS_NETWORK_ISDN        0x04
> +#define PCI_SUBCLASS_NETWORK_WORDFIP     0x05
> +#define PCI_SUBCLASS_NETWORK_PICMG214    0x06
> +#define PCI_SUBCLASS_NETWORK_OTHER       0x80
> +
> +#define PCI_BASE_CLASS_DISPLAY           0x03
> +#define PCI_SUBCLASS_DISPLAY_VGA         0x00
> +#define PCI_SUBCLASS_DISPLAY_XGA         0x01
> +#define PCI_SUBCLASS_DISPLAY_3D          0x02
> +#define PCI_SUBCLASS_DISPLAY_OTHER       0x80
> +
> +#define PCI_BASE_CLASS_MULTIMEDIA        0x04
> +#define PCI_SUBCLASS_MULTIMEDIA_VIDEO    0x00
> +#define PCI_SUBCLASS_MULTIMEDIA_AUDIO    0x01
> +#define PCI_SUBCLASS_MULTIMEDIA_PHONE    0x02
> +#define PCI_SUBCLASS_MULTIMEDIA_OTHER    0x80
> +
> +#define PCI_BASE_CLASS_MEMORY            0x05
> +#define PCI_SUBCLASS_MEMORY_RAM          0x00
> +#define PCI_SUBCLASS_MEMORY_FLASH        0x01
> +
> +#define PCI_BASE_CLASS_BRIDGE            0x06
> +#define PCI_SUBCLASS_BRIDGE_HOST         0x00
> +#define PCI_SUBCLASS_BRIDGE_ISA          0x01
> +#define PCI_SUBCLASS_BRIDGE_EISA         0x02
> +#define PCI_SUBCLASS_BRIDGE_MC           0x03
> +#define PCI_SUBCLASS_BRIDGE_PCI          0x04
> +#define PCI_SUBCLASS_BRIDGE_PCMCIA       0x05
> +#define PCI_SUBCLASS_BRIDGE_NUBUS        0x06
> +#define PCI_SUBCLASS_BRIDGE_CARDBUS      0x07
> +#define PCI_SUBCLASS_BRIDGE_RACEWAY      0x08
> +#define PCI_SUBCLASS_BRIDGE_PCI_SEMITP   0x09
> +#define PCI_SUBCLASS_BRIDGE_IB_PCI       0x0a
> +#define PCI_SUBCLASS_BRIDGE_OTHER        0x80
> +
> +#define PCI_BASE_CLASS_COMMUNICATION     0x07
> +#define PCI_SUBCLASS_COMMUNICATION_SERIAL 0x00
> +#define PCI_SUBCLASS_COMMUNICATION_PARALLEL 0x01
> +#define PCI_SUBCLASS_COMMUNICATION_MULTISERIAL 0x02
> +#define PCI_SUBCLASS_COMMUNICATION_MODEM 0x03
> +#define PCI_SUBCLASS_COMMUNICATION_GPIB  0x04
> +#define PCI_SUBCLASS_COMMUNICATION_SC    0x05
> +#define PCI_SUBCLASS_COMMUNICATION_OTHER 0x80
> +
> +#define PCI_BASE_CLASS_SYSTEM            0x08
> +#define PCI_SUBCLASS_SYSTEM_PIC          0x00
> +#define PCI_SUBCLASS_SYSTEM_DMA          0x01
> +#define PCI_SUBCLASS_SYSTEM_TIMER        0x02
> +#define PCI_SUBCLASS_SYSTEM_RTC          0x03
> +#define PCI_SUBCLASS_SYSTEM_HOTPLUG      0x04
> +#define PCI_SUBCLASS_SYSTEM_SD           0x05
> +#define PCI_SUBCLASS_SYSTEM_OTHER        0x80
> +
> +#define PCI_BASE_CLASS_INPUT             0x09
> +#define PCI_SUBCLASS_INPUT_KEYBOARD      0x00
> +#define PCI_SUBCLASS_INPUT_PEN           0x01
> +#define PCI_SUBCLASS_INPUT_MOUSE         0x02
> +#define PCI_SUBCLASS_INPUT_SCANNER       0x03
> +#define PCI_SUBCLASS_INPUT_GAMEPORT      0x04
> +#define PCI_SUBCLASS_INPUT_OTHER         0x80
> +
> +#define PCI_BASE_CLASS_DOCKING           0x0a
> +#define PCI_SUBCLASS_DOCKING_GENERIC     0x00
> +#define PCI_SUBCLASS_DOCKING_OTHER       0x80
> +
> +#define PCI_BASE_CLASS_PROCESSOR         0x0b
> +#define PCI_SUBCLASS_PROCESSOR_386       0x00
> +#define PCI_SUBCLASS_PROCESSOR_486       0x01
> +#define PCI_SUBCLASS_PROCESSOR_PENTIUM   0x02
> +#define PCI_SUBCLASS_PROCESSOR_ALPHA     0x10
> +#define PCI_SUBCLASS_PROCESSOR_POWERPC   0x20
> +#define PCI_SUBCLASS_PROCESSOR_MIPS      0x30
> +#define PCI_SUBCLASS_PROCESSOR_CO        0x40
> +
> +#define PCI_BASE_CLASS_SERIAL            0x0c
> +#define PCI_SUBCLASS_SERIAL_FIREWIRE     0x00
> +#define PCI_SUBCLASS_SERIAL_ACCESS       0x01
> +#define PCI_SUBCLASS_SERIAL_SSA          0x02
> +#define PCI_SUBCLASS_SERIAL_USB          0x03
> +#define PCI_SUBCLASS_SERIAL_FIBER        0x04
> +#define PCI_SUBCLASS_SERIAL_SMBUS        0x05
> +#define PCI_SUBCLASS_SERIAL_IB           0x06
> +#define PCI_SUBCLASS_SERIAL_IPMI         0x07
> +#define PCI_SUBCLASS_SERIAL_SERCOS       0x08
> +#define PCI_SUBCLASS_SERIAL_CANBUS       0x09
> +
> +#define PCI_BASE_CLASS_WIRELESS          0x0d
> +#define PCI_SUBCLASS_WIRELESS_IRDA       0x00
> +#define PCI_SUBCLASS_WIRELESS_CIR        0x01
> +#define PCI_SUBCLASS_WIRELESS_RF_CONTROLLER 0x10
> +#define PCI_SUBCLASS_WIRELESS_BLUETOOTH  0x11
> +#define PCI_SUBCLASS_WIRELESS_BROADBAND  0x12
> +#define PCI_SUBCLASS_WIRELESS_OTHER      0x80
> +
> +#define PCI_BASE_CLASS_SATELLITE         0x0f
> +#define PCI_SUBCLASS_SATELLITE_TV        0x00
> +#define PCI_SUBCLASS_SATELLITE_AUDIO     0x01
> +#define PCI_SUBCLASS_SATELLITE_VOICE     0x03
> +#define PCI_SUBCLASS_SATELLITE_DATA      0x04
> +
> +#define PCI_BASE_CLASS_CRYPT             0x10
> +#define PCI_SUBCLASS_CRYPT_NETWORK       0x00
> +#define PCI_SUBCLASS_CRYPT_ENTERTAINMENT 0x01
> +#define PCI_SUBCLASS_CRYPT_OTHER         0x80
> +
> +#define PCI_BASE_CLASS_SIGNAL_PROCESSING 0x11
> +#define PCI_SUBCLASS_SP_DPIO             0x00
> +#define PCI_SUBCLASS_SP_PERF             0x01
> +#define PCI_SUBCLASS_SP_SYNCH            0x10
> +#define PCI_SUBCLASS_SP_MANAGEMENT       0x20
> +#define PCI_SUBCLASS_SP_OTHER            0x80
> +
> +#define PCI_CLASS_OTHERS                 0xff

I just discovered that there are already defines for this in
include/hw/pci/pci_ids.h ... could you use those instead (and
add missing types there, too)?

 Thomas