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Re: [Qemu-devel] [PATCH v1 1/1] cadence_gem: Correct Marvell PHY SPCFC r
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From: |
Edgar E. Iglesias |
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Subject: |
Re: [Qemu-devel] [PATCH v1 1/1] cadence_gem: Correct Marvell PHY SPCFC reset value |
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Date: |
Fri, 4 Sep 2015 23:08:44 +0200 |
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User-agent: |
Mutt/1.5.21 (2010-09-15) |
On Fri, Sep 04, 2015 at 07:12:23PM +0100, Peter Maydell wrote:
> On 4 September 2015 at 19:00, Alistair Francis
> <address@hidden> wrote:
> > On Thu, Sep 3, 2015 at 3:56 PM, Edgar E. Iglesias
> > <address@hidden> wrote:
> >> On Thu, Sep 03, 2015 at 03:10:52PM -0700, Alistair Francis wrote:
> >>> Bit 15 of the PHY Specific Status Register is reserved and
> >>> should remain 0. Fix the reset value to ensure that the 15th
> >>> bit is not set.
> >>>
> >>> Signed-off-by: Alistair Francis <address@hidden>
> >>
> >> Reviewed-by: Edgar E. Iglesias <address@hidden>
> >
> > Thanks Edgar.
> >
> > Should this go via the ARM queue?
>
> I was planning to pick it up, unless Edgar would rather
> something else.
Sounds good if you take it Peter, thanks!
Best regards,
Edgar