Re: [Qemu-devel] [PATCH v14 33/33] target-tilegx: Handle v1shl, v1shru, v1shrs

[Peter Maydell]

On 24 August 2015 at 17:17, Richard Henderson <address@hidden> wrote:
> Signed-off-by: Richard Henderson <address@hidden>
> ---
>  target-tilegx/Makefile.objs |  2 +-
>  target-tilegx/helper.h      |  4 +++
>  target-tilegx/simd_helper.c | 63 
> +++++++++++++++++++++++++++++++++++++++++++++
>  target-tilegx/translate.c   | 17 +++++++++++-
>  4 files changed, 84 insertions(+), 2 deletions(-)
>  create mode 100644 target-tilegx/simd_helper.c
>
> diff --git a/target-tilegx/Makefile.objs b/target-tilegx/Makefile.objs
> index 8b3dc76..0db778f 100644
> --- a/target-tilegx/Makefile.objs
> +++ b/target-tilegx/Makefile.objs
> @@ -1 +1 @@
> -obj-y += cpu.o translate.o helper.o
> +obj-y += cpu.o translate.o helper.o simd_helper.o
> diff --git a/target-tilegx/helper.h b/target-tilegx/helper.h
> index 644d313..766f5f2 100644
> --- a/target-tilegx/helper.h
> +++ b/target-tilegx/helper.h
> @@ -4,3 +4,7 @@ DEF_HELPER_FLAGS_1(cnttz, TCG_CALL_NO_RWG_SE, i64, i64)
>  DEF_HELPER_FLAGS_1(pcnt, TCG_CALL_NO_RWG_SE, i64, i64)
>  DEF_HELPER_FLAGS_1(revbits, TCG_CALL_NO_RWG_SE, i64, i64)
>  DEF_HELPER_FLAGS_3(shufflebytes, TCG_CALL_NO_RWG_SE, i64, i64, i64, i64)
> +
> +DEF_HELPER_FLAGS_2(v1shl, TCG_CALL_NO_RWG_SE, i64, i64, i64)
> +DEF_HELPER_FLAGS_2(v1shru, TCG_CALL_NO_RWG_SE, i64, i64, i64)
> +DEF_HELPER_FLAGS_2(v1shrs, TCG_CALL_NO_RWG_SE, i64, i64, i64)
> diff --git a/target-tilegx/simd_helper.c b/target-tilegx/simd_helper.c
> new file mode 100644
> index 0000000..7670d4a
> --- /dev/null
> +++ b/target-tilegx/simd_helper.c
> @@ -0,0 +1,63 @@
> +/*
> + * QEMU TILE-Gx helpers
> + *
> + *  Copyright (c) 2015 Chen Gang
> + *
> + * This library is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU Lesser General Public
> + * License as published by the Free Software Foundation; either
> + * version 2.1 of the License, or (at your option) any later version.
> + *
> + * This library is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
> + * Lesser General Public License for more details.
> + *
> + * You should have received a copy of the GNU Lesser General Public
> + * License along with this library; if not, see
> + * <http://www.gnu.org/licenses/lgpl-2.1.html>
> + */
> +
> +#include "cpu.h"
> +#include "qemu-common.h"
> +#include "exec/helper-proto.h"
> +
> +
> +uint64_t helper_v1shl(uint64_t a, uint64_t b)
> +{
> +    uint64_t r = 0;
> +    int i;
> +
> +    for (i = 0; i < 64; i += 8) {
> +        uint64_t m = 0xffULL << i;
> +        uint64_t be = (b >> i) & 7;
> +        r |= ((a & m) << be) & m;
> +    }

This seems to be shifting each byte in the input vector
by an amount encoded in each byte in b, but the ISA says
this instruction shifts each byte by the same amount.
Similarly for v1shru and v1shrs.

thanks
-- PMM